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author | Curtis Chen <curtis.chen@intel.com> | 2021-12-23 18:02:02 +0800 |
---|---|---|
committer | Felix Held <felix-coreboot@felixheld.de> | 2022-01-10 14:27:41 +0000 |
commit | b7d1b35175db3bc895c511125626cb87442d33c6 (patch) | |
tree | a4c40a69c923e479a5e411c67f75467a4102fb1d /util | |
parent | 150fee60cc6f30fe3dddcf504958cd2b916f469b (diff) |
mb/google/brya/var/brask: Update PL and PsysPL
Update all the ADL-P 15W/28W/45W SKU's PL and PsysPL. These config
values are generated iPDG application with ADL-P platform package
tool. RDC Kit ID for the iPDG tools:
* Intel(R) Platform Design Studio Installer: 610905.
* Intel(R) Platform Design Studio - Libraries: 613643
* Intel(R) Platform Design Studio - Platform ADL-P (Partial): 627345.
* Intel(R) Platform Design Studio - Platform ADL-P (Full): 630261.
BUG=b:211365920
BRANCH=none
TEST=Compare the measured power from adapter with the value of 'psys'
from the command 'dump_intel_rapl_consumption'.
Signed-off-by: Curtis Chen <curtis.chen@intel.com>
Change-Id: I4a827ae40e26294db20d5d1b2121dcce5118e290
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60323
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'util')
0 files changed, 0 insertions, 0 deletions