amdfwtool: Add entry types required to support glinda & phoenix SOC

Change-Id: I7565c5eda75b332a48613440d7e4cfb388d5012f
Signed-off-by: Zheng Bao <fishbaozi@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/69045
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: ritul guru <ritul.bits@gmail.com>
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>

3 files changed, 127 insertions, 3 deletions

diff --git a/util/amdfwtool/amdfwtool.c b/util/amdfwtool/amdfwtool.c
index bf1c0b2251..b23ee4701d 100644
--- a/util/amdfwtool/amdfwtool.c
+++ b/util/amdfwtool/amdfwtool.c
@@ -256,6 +256,10 @@ amd_fw_entry amd_psp_fw_table[] = {
 	{ .type = AMD_FW_PSP_SMU_FIRMWARE2, .level = PSP_BOTH | PSP_LVL2_AB },
 	{ .type = AMD_FW_PSP_SMU_FIRMWARE2, .subprog = 1, .level = PSP_BOTH | PSP_LVL2_AB },
 	{ .type = AMD_FW_PSP_SMU_FIRMWARE2, .subprog = 2, .level = PSP_BOTH | PSP_LVL2_AB },
+	{ .type = AMD_BOOT_DRIVER, .level = PSP_BOTH | PSP_LVL2_AB },
+	{ .type = AMD_SOC_DRIVER, .level = PSP_BOTH | PSP_LVL2_AB },
+	{ .type = AMD_DEBUG_DRIVER, .level = PSP_BOTH | PSP_LVL2_AB },
+	{ .type = AMD_INTERFACE_DRIVER, .level = PSP_BOTH | PSP_LVL2_AB },
 	{ .type = AMD_DEBUG_UNLOCK, .level = PSP_LVL2 | PSP_LVL2_AB },
 	{ .type = AMD_HW_IPCFG, .level = PSP_LVL2 | PSP_LVL2_AB },
 	{ .type = AMD_WRAPPED_IKEK, .level = PSP_BOTH | PSP_LVL2_AB, .skip_hashing = true },
@@ -298,15 +302,29 @@ amd_fw_entry amd_psp_fw_table[] = {
 	{ .type = AMD_FW_DMCU_ISR, .level = PSP_LVL2 | PSP_LVL2_AB },
 	{ .type = AMD_FW_MSMU, .level = PSP_LVL2 | PSP_LVL2_AB },
 	{ .type = AMD_FW_SPIROM_CFG, .level = PSP_LVL2 | PSP_LVL2_AB },
-	{ .type = AMD_FW_MPIO, .level = PSP_BOTH | PSP_BOTH_AB },
-	{ .type = AMD_FW_PSP_SMUSCS, .level = PSP_BOTH },
+	{ .type = AMD_FW_MPIO, .level = PSP_LVL2 | PSP_BOTH_AB },
+	{ .type = AMD_FW_PSP_SMUSCS, .level = PSP_BOTH | PSP_LVL2_AB },
 	{ .type = AMD_FW_DMCUB, .level = PSP_LVL2 | PSP_LVL2_AB },
 	{ .type = AMD_FW_PSP_BOOTLOADER_AB, .level = PSP_LVL2 | PSP_LVL2_AB },
-	{ .type = AMD_RIB, .level = PSP_BOTH | PSP_BOTH_AB },
+	{ .type = AMD_RIB, .level = PSP_LVL2 | PSP_BOTH_AB },
 	{ .type = AMD_FW_MPDMA_TF, .level = PSP_BOTH | PSP_BOTH_AB },
 	{ .type = AMD_TA_IKEK, .level = PSP_BOTH | PSP_LVL2_AB, .skip_hashing = true },
 	{ .type = AMD_FW_GMI3_PHY, .level = PSP_BOTH | PSP_BOTH_AB },
 	{ .type = AMD_FW_MPDMA_PM, .level = PSP_BOTH | PSP_BOTH_AB },
+	{ .type = AMD_FW_AMF_SRAM, .level = PSP_LVL2 | PSP_LVL2_AB },
+	{ .type = AMD_FW_AMF_DRAM, .inst = 0, .level = PSP_LVL2 | PSP_LVL2_AB },
+	{ .type = AMD_FW_AMF_DRAM, .inst = 1, .level = PSP_LVL2 | PSP_LVL2_AB },
+	{ .type = AMD_FW_FCFG_TABLE, .level = PSP_LVL2 | PSP_LVL2_AB },
+	{ .type = AMD_FW_AMF_WLAN, .inst = 0, .level = PSP_LVL2 | PSP_LVL2_AB },
+	{ .type = AMD_FW_AMF_WLAN, .inst = 1, .level = PSP_LVL2 | PSP_LVL2_AB },
+	{ .type = AMD_FW_AMF_MFD, .level = PSP_LVL2 | PSP_LVL2_AB },
+	{ .type = AMD_TA_IKEK, .level = PSP_BOTH | PSP_LVL2_AB, .skip_hashing = true },
+	{ .type = AMD_FW_MPCCX, .level = PSP_LVL2 | PSP_LVL2_AB },
+	{ .type = AMD_FW_LSDMA, .level = PSP_LVL2 | PSP_LVL2_AB },
+	{ .type = AMD_FW_C20_MP, .level = PSP_BOTH | PSP_LVL2_AB },
+	{ .type = AMD_FW_MINIMSMU, .inst = 0, .level = PSP_BOTH | PSP_LVL2_AB },
+	{ .type = AMD_FW_MINIMSMU, .inst = 1, .level = PSP_BOTH | PSP_LVL2_AB },
+	{ .type = AMD_FW_SRAM_FW_EXT, .level = PSP_LVL2 | PSP_LVL2_AB },
 	{ .type = AMD_FW_INVALID },
 };
 
@@ -364,10 +382,22 @@ amd_bios_entry amd_bios_table[] = {
 	{ .type = AMD_BIOS_PMUD, .inst = 3, .subpr = 0, .level = BDT_BOTH },
 	{ .type = AMD_BIOS_PMUI, .inst = 4, .subpr = 0, .level = BDT_BOTH },
 	{ .type = AMD_BIOS_PMUD, .inst = 4, .subpr = 0, .level = BDT_BOTH },
+	{ .type = AMD_BIOS_PMUI, .inst = 5, .subpr = 0, .level = BDT_BOTH },
+	{ .type = AMD_BIOS_PMUD, .inst = 5, .subpr = 0, .level = BDT_BOTH },
+	{ .type = AMD_BIOS_PMUI, .inst = 6, .subpr = 0, .level = BDT_BOTH },
+	{ .type = AMD_BIOS_PMUD, .inst = 6, .subpr = 0, .level = BDT_BOTH },
+	{ .type = AMD_BIOS_PMUI, .inst = 7, .subpr = 0, .level = BDT_BOTH },
+	{ .type = AMD_BIOS_PMUD, .inst = 7, .subpr = 0, .level = BDT_BOTH },
 	{ .type = AMD_BIOS_PMUI, .inst = 9, .subpr = 0, .level = BDT_BOTH },
 	{ .type = AMD_BIOS_PMUD, .inst = 9, .subpr = 0, .level = BDT_BOTH },
 	{ .type = AMD_BIOS_PMUI, .inst = 10, .subpr = 0, .level = BDT_BOTH },
 	{ .type = AMD_BIOS_PMUD, .inst = 10, .subpr = 0, .level = BDT_BOTH },
+	{ .type = AMD_BIOS_PMUI, .inst = 11, .subpr = 0, .level = BDT_BOTH },
+	{ .type = AMD_BIOS_PMUD, .inst = 11, .subpr = 0, .level = BDT_BOTH },
+	{ .type = AMD_BIOS_PMUI, .inst = 12, .subpr = 0, .level = BDT_BOTH },
+	{ .type = AMD_BIOS_PMUD, .inst = 12, .subpr = 0, .level = BDT_BOTH },
+	{ .type = AMD_BIOS_PMUI, .inst = 13, .subpr = 0, .level = BDT_BOTH },
+	{ .type = AMD_BIOS_PMUD, .inst = 13, .subpr = 0, .level = BDT_BOTH },
 	{ .type = AMD_BIOS_PMUI, .inst = 1, .subpr = 1, .level = BDT_BOTH },
 	{ .type = AMD_BIOS_PMUD, .inst = 1, .subpr = 1, .level = BDT_BOTH },
 	{ .type = AMD_BIOS_PMUI, .inst = 2, .subpr = 1, .level = BDT_BOTH },
@@ -376,10 +406,22 @@ amd_bios_entry amd_bios_table[] = {
 	{ .type = AMD_BIOS_PMUD, .inst = 3, .subpr = 1, .level = BDT_BOTH },
 	{ .type = AMD_BIOS_PMUI, .inst = 4, .subpr = 1, .level = BDT_BOTH },
 	{ .type = AMD_BIOS_PMUD, .inst = 4, .subpr = 1, .level = BDT_BOTH },
+	{ .type = AMD_BIOS_PMUI, .inst = 5, .subpr = 1, .level = BDT_BOTH },
+	{ .type = AMD_BIOS_PMUD, .inst = 5, .subpr = 1, .level = BDT_BOTH },
+	{ .type = AMD_BIOS_PMUI, .inst = 6, .subpr = 1, .level = BDT_BOTH },
+	{ .type = AMD_BIOS_PMUD, .inst = 6, .subpr = 1, .level = BDT_BOTH },
+	{ .type = AMD_BIOS_PMUI, .inst = 7, .subpr = 1, .level = BDT_BOTH },
+	{ .type = AMD_BIOS_PMUD, .inst = 7, .subpr = 1, .level = BDT_BOTH },
 	{ .type = AMD_BIOS_PMUI, .inst = 9, .subpr = 1, .level = BDT_BOTH },
 	{ .type = AMD_BIOS_PMUD, .inst = 9, .subpr = 1, .level = BDT_BOTH },
 	{ .type = AMD_BIOS_PMUI, .inst = 10, .subpr = 1, .level = BDT_BOTH },
 	{ .type = AMD_BIOS_PMUD, .inst = 10, .subpr = 1, .level = BDT_BOTH },
+	{ .type = AMD_BIOS_PMUI, .inst = 11, .subpr = 1, .level = BDT_BOTH },
+	{ .type = AMD_BIOS_PMUD, .inst = 11, .subpr = 1, .level = BDT_BOTH },
+	{ .type = AMD_BIOS_PMUI, .inst = 12, .subpr = 1, .level = BDT_BOTH },
+	{ .type = AMD_BIOS_PMUD, .inst = 12, .subpr = 1, .level = BDT_BOTH },
+	{ .type = AMD_BIOS_PMUI, .inst = 13, .subpr = 1, .level = BDT_BOTH },
+	{ .type = AMD_BIOS_PMUD, .inst = 13, .subpr = 1, .level = BDT_BOTH },
 	{ .type = AMD_BIOS_UCODE, .inst = 0, .level = BDT_LVL2 },
 	{ .type = AMD_BIOS_UCODE, .inst = 1, .level = BDT_LVL2 },
 	{ .type = AMD_BIOS_UCODE, .inst = 2, .level = BDT_LVL2 },
diff --git a/util/amdfwtool/amdfwtool.h b/util/amdfwtool/amdfwtool.h
index a4ebbcd974..d3d686669e 100644
--- a/util/amdfwtool/amdfwtool.h
+++ b/util/amdfwtool/amdfwtool.h
@@ -24,6 +24,10 @@ typedef enum _amd_fw_type {
 	AMD_FW_PSP_TRUSTLETKEY = 0x0d,
 	AMD_FW_PSP_SMU_FIRMWARE2 = 0x12,
 	AMD_DEBUG_UNLOCK = 0x13,
+	AMD_BOOT_DRIVER = 0x1b,
+	AMD_SOC_DRIVER = 0x1c,
+	AMD_DEBUG_DRIVER = 0x1d,
+	AMD_INTERFACE_DRIVER = 0x1f,
 	AMD_HW_IPCFG = 0x20,
 	AMD_WRAPPED_IKEK = 0x21,
 	AMD_TOKEN_UNLOCK = 0x22,
@@ -64,14 +68,25 @@ typedef enum _amd_fw_type {
 	AMD_FW_MSMU = 0x5a,
 	AMD_FW_SPIROM_CFG = 0x5c,
 	AMD_FW_MPIO = 0x5d,
+	AMD_FW_TPMLITE = 0x5f,
 	AMD_FW_PSP_SMUSCS = 0x5f,
 	AMD_FW_DMCUB = 0x71,
 	AMD_FW_PSP_BOOTLOADER_AB = 0x73,
 	AMD_RIB = 0x76,
+	AMD_FW_AMF_SRAM = 0x85,
+	AMD_FW_AMF_DRAM = 0x86,
+	AMD_FW_AMF_WLAN = 0x88,
+	AMD_FW_AMF_MFD = 0x89,
 	AMD_FW_MPDMA_TF = 0x8c,
 	AMD_TA_IKEK = 0x8d,
+	AMD_FW_MPCCX = 0x90,
 	AMD_FW_GMI3_PHY = 0x91,
 	AMD_FW_MPDMA_PM = 0x92,
+	AMD_FW_LSDMA = 0x94,
+	AMD_FW_C20_MP = 0x95,
+	AMD_FW_FCFG_TABLE = 0x98,
+	AMD_FW_MINIMSMU = 0x9a,
+	AMD_FW_SRAM_FW_EXT = 0x9d,
 	AMD_FW_IMC = 0x200,	/* Large enough to be larger than the top BHD entry type. */
 	AMD_FW_GEC,
 	AMD_FW_XHCI,
diff --git a/util/amdfwtool/data_parse.c b/util/amdfwtool/data_parse.c
index a28a7eb168..793fa9bf04 100644
--- a/util/amdfwtool/data_parse.c
+++ b/util/amdfwtool/data_parse.c
@@ -171,6 +171,18 @@ static uint8_t find_register_fw_filename_psp_dir(char *fw_name, char *filename,
 	} else if (strcmp(fw_name, "PSP_SMUFW2_SUB2_FILE") == 0) {
 		fw_type = AMD_FW_PSP_SMU_FIRMWARE2;
 		subprog = 2;
+	} else if (strcmp(fw_name, "PSP_BOOT_DRIVER_FILE") == 0) {
+		fw_type = AMD_BOOT_DRIVER;
+		subprog = 0;
+	} else if (strcmp(fw_name, "PSP_SOC_DRIVER_FILE") == 0) {
+		fw_type = AMD_SOC_DRIVER;
+		subprog = 0;
+	} else if (strcmp(fw_name, "PSP_DEBUG_DRIVER_FILE") == 0) {
+		fw_type = AMD_DEBUG_DRIVER;
+		subprog = 0;
+	} else if (strcmp(fw_name, "PSP_INTERFACE_DRIVER_FILE") == 0) {
+		fw_type = AMD_INTERFACE_DRIVER;
+		subprog = 0;
 	} else if (strcmp(fw_name, "PSP_SEC_DBG_KEY_FILE") == 0) {
 		if (cb_config->unlock_secure) {
 			fw_type = AMD_FW_PSP_SECURED_DEBUG;
@@ -263,6 +275,51 @@ static uint8_t find_register_fw_filename_psp_dir(char *fw_name, char *filename,
 		} else {
 			fw_type = AMD_FW_SKIP;
 		}
+	} else if (strcmp(fw_name, "PSP_C20MP_FILE") == 0) {
+		fw_type = AMD_FW_C20_MP;
+		subprog = 0;
+	} else if (strcmp(fw_name, "RIB_FILE") == 0) {
+		fw_type = AMD_RIB;
+		subprog = 0;
+	} else if (strcmp(fw_name, "AMF_SRAM_FILE") == 0) {
+		fw_type = AMD_FW_AMF_SRAM;
+		subprog = 0;
+	} else if (strcmp(fw_name, "AMF_DRAM_FILE_INS0") == 0) {
+		fw_type = AMD_FW_AMF_DRAM;
+		subprog = 0;
+		instance = 0;
+	} else if (strcmp(fw_name, "AMF_DRAM_FILE_INS1") == 0) {
+		fw_type = AMD_FW_AMF_DRAM;
+		subprog = 0;
+		instance = 1;
+	} else if (strcmp(fw_name, "AMF_WLAN_FILE_INS0") == 0) {
+		fw_type = AMD_FW_AMF_WLAN;
+		subprog = 0;
+		instance = 0;
+	} else if (strcmp(fw_name, "AMF_WLAN_FILE_INS1") == 0) {
+		fw_type = AMD_FW_AMF_WLAN;
+		subprog = 0;
+		instance = 1;
+	} else if (strcmp(fw_name, "AMF_MFD_FILE") == 0) {
+		fw_type = AMD_FW_AMF_MFD;
+		subprog = 0;
+	} else if (strcmp(fw_name, "MPCCX_FILE") == 0) {
+		fw_type = AMD_FW_MPCCX;
+		subprog = 0;
+	} else if (strcmp(fw_name, "LSDMA_FILE") == 0) {
+		fw_type = AMD_FW_LSDMA;
+		subprog = 0;
+	} else if (strcmp(fw_name, "MINIMSMU_FILE") == 0) {
+		fw_type = AMD_FW_MINIMSMU;
+		instance = 0;
+		subprog = 0;
+	} else if (strcmp(fw_name, "MINIMSMU_FILE_INS1") == 0) {
+		fw_type = AMD_FW_MINIMSMU;
+		instance = 1;
+		subprog = 0;
+	} else if (strcmp(fw_name, "SRAM_FW_EXT_FILE") == 0) {
+		fw_type = AMD_FW_SRAM_FW_EXT;
+		subprog = 0;
 	} else if (strcmp(fw_name, "PSP_DRIVERS_FILE") == 0) {
 		fw_type = AMD_DRIVER_ENTRIES;
 		subprog = 0;
@@ -316,6 +373,13 @@ static uint8_t find_register_fw_filename_psp_dir(char *fw_name, char *filename,
 	} else if (strcmp(fw_name, "SPIROM_CONFIG_FILE") == 0) {
 		fw_type = AMD_FW_SPIROM_CFG;
 		subprog = 0;
+	} else if (strcmp(fw_name, "MPIO_FILE") == 0) {
+		fw_type = AMD_FW_MPIO;
+		subprog = 0;
+	} else if (strcmp(fw_name, "TPMLITE_FILE") == 0) {
+		printf("TPMLITE\n");
+		fw_type = AMD_FW_TPMLITE;
+		subprog = 0;
 	} else if (strcmp(fw_name, "PSP_KVM_ENGINE_DUMMY_FILE") == 0) {
 		fw_type = AMD_FW_KVM_IMAGE;
 		subprog = 0;
@@ -353,6 +417,9 @@ static uint8_t find_register_fw_filename_psp_dir(char *fw_name, char *filename,
 	} else if (strcmp(fw_name, "PSP_RIB_FILE") == 0) {
 		fw_type = AMD_RIB;
 		subprog = 0;
+	} else if (strcmp(fw_name, "FEATURE_TABLE_FILE") == 0) {
+		fw_type = AMD_FW_FCFG_TABLE;
+		subprog = 0;
 	} else if (strcmp(fw_name, "PSP_MPDMATFFW_FILE") == 0) {
 		fw_type = AMD_FW_MPDMA_TF;
 		subprog = 0;