diff options
| author | Joey Peng <joey.peng@lcfc.corp-partner.google.com> | 2021-11-08 15:21:32 +0800 |
|---|---|---|
| committer | Tim Wawrzynczak <twawrzynczak@chromium.org> | 2021-11-11 16:18:01 +0000 |
| commit | 7bca1e474cfaccecf5309f235ebb2c36d0bac73e (patch) | |
| tree | 8b4be4d8e734903cc0919f73b5efa3a4d07b9a3b /util | |
| parent | ca6915257913d6ebe7103b6d4e3077d727ea332f (diff) | |
mb/google/brya/var/taeko: Enable CPU PCIE RP 1
Modify settings to enable CPU PCIE RP 1 according to schematics.
BUG=b:205504257
TEST=emerge-brya coreboot and can successfully boot with ssd and emmc.
Signed-off-by: Joey Peng <joey.peng@lcfc.corp-partner.google.com>
Change-Id: I0f817c860f2b295c6aa84fa1999d374d99f817f6
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59080
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'util')
0 files changed, 0 insertions, 0 deletions