summaryrefslogtreecommitdiff
path: root/util
diff options
context:
space:
mode:
authorFelix Held <felix-coreboot@felixheld.de>2024-01-30 15:15:31 +0100
committerFelix Held <felix-coreboot@felixheld.de>2024-02-01 11:38:10 +0000
commit30f36c35e75a1491edfc629766c146707dcb22f5 (patch)
tree8dd839a7e2e39b668ef67ef3a147761935bd675a /util
parent5ab978f5ded4a0d964b548d6cb25ac4a9cc7683b (diff)
soc/amd: rework DRAM and fixed resource reporting
Introduce read_soc_memmap_resources which gets called by amd_pci_domain_read_resources for the first domain of the SoC to report the DRAM and PCI config space access resources to the allocator. For Genoa this allows to use amd_pci_domain_read_resources as read_resources in the genoa_pci_domain_ops instead of needing to wrap that call to be able to call add_opensil_memmap for the first domain. For the other family 17h+ SoCs the moves the reporting of the DRAM resources and the PCI config space access resources from the northbridge device to the domain device. TEST=Resources still get reported on Mandolin, but now under the domain instead of the northbridge PCI device Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: Ib19fd94e06fa3a1d95ade7fafe22db013045a942 Reviewed-on: https://review.coreboot.org/c/coreboot/+/80268 Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'util')
0 files changed, 0 insertions, 0 deletions