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authorAngel Pons <th3fanbus@gmail.com>2020-06-21 16:18:27 +0200
committerAngel Pons <th3fanbus@gmail.com>2020-07-22 08:27:23 +0000
commit27387c3cf5c681b1f52fd45ebe232df593e5d052 (patch)
tree8b499178a28aa3b8a4b07a6659162ab74ccb6c3c /util
parent4cdc698707741f4542f8a5757b3c17e66f3dddd9 (diff)
sb/intel/i82801jx: Drop `c3_latency`
The three mainboards using this southbridge do not define it. Note that the default value of zero might be wrong, so add a FIXME comment. Change-Id: Id16bb12a4628daf311bddf7e4701fc480d6b18e5 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/42656 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'util')
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