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authorStefan Reinauer <stefan.reinauer@coreboot.org>2016-05-05 20:21:47 -0700
committerMartin Roth <martinroth@google.com>2016-05-13 17:34:13 +0200
commit0b4db1399462dc8febb6d5c798b68c257f9055b1 (patch)
treef6c303ce9f8017c9f6e4dca3a7c11011332c3955 /util/superiotool/pci.c
parent1eaf58be2c2cc16f2fec7cfd0a58da4402647f70 (diff)
vendorcode/intel/fsp1_0: Don't break GCC strict aliasing
Change-Id: I6b345670db7df652b8b712b721dfe2905373e0d5 Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-on: https://review.coreboot.org/14630 Tested-by: build bot (Jenkins) Reviewed-by: Leroy P Leahy <leroy.p.leahy@intel.com> Reviewed-by: York Yang <york.yang@intel.com>
Diffstat (limited to 'util/superiotool/pci.c')
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