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| author | Angel Pons <th3fanbus@gmail.com> | 2020-10-23 20:40:46 +0200 |
|---|---|---|
| committer | Angel Pons <th3fanbus@gmail.com> | 2020-10-30 00:43:24 +0000 |
| commit | 5e60637ef6ca64bedacbdd5aad1d1a7a85d67c05 (patch) | |
| tree | f92b3faf9231dc29d8777204a070dc97c6f5d33b /util/superiotool/aspeed.c | |
| parent | f2a295a5b6201b8346aa2474dc0e0a01d8806909 (diff) | |
mb/intel/wtm2: Prepare devicetree for PCH split
Tested with BUILD_TIMELESS=1, coreboot.rom remains identical.
Change-Id: I75d6594f9576c96a585526c652a070cb9616dbe9
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46704
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'util/superiotool/aspeed.c')
0 files changed, 0 insertions, 0 deletions