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| author | Dtrain Hsu <dtrain_hsu@compal.corp-partner.google.com> | 2022-03-21 14:51:18 +0800 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-03-22 15:21:26 +0000 |
| commit | 5d3b1bbce4b3aefaee66e1d96be058397a9d7840 (patch) | |
| tree | 54328136c2924f00a9dcb4fb6d72b0601e0c8e5c /util/spd_tools/src | |
| parent | 1f54599b9875e0de80c8636626bdfbe01646783c (diff) | |
mb/google/brya/var/kinox: Modify DDR4 to non-interleaved
Kinox is designed to 8-layer PCB. In order to reduce the length of
memory singals, the DDR4 is designed from interleaved to
non-interleaved.
BUG=b:210094309
TEST=emerge-brask coreboot
Signed-off-by: Dtrain Hsu <dtrain_hsu@compal.corp-partner.google.com>
Change-Id: I03c6fcccf8b1646cec1a35cc1f9cbb1cfb942c4e
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62953
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Zhuohao Lee <zhuohao@google.com>
Diffstat (limited to 'util/spd_tools/src')
0 files changed, 0 insertions, 0 deletions