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author | Sridahr Siricilla <sridhar.siricilla@intel.com> | 2021-11-11 01:10:16 +0530 |
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committer | Felix Held <felix-coreboot@felixheld.de> | 2022-01-28 15:05:31 +0000 |
commit | 73b90c68723b3a138f8fce8c431717222fbf5aa2 (patch) | |
tree | 61f6af2ba1d998fa8c5b13663063196516563b4f /util/scripts/update_submodules | |
parent | 117361278f0e1491d6f745fa19a5f75f0cc73b0a (diff) |
soc/intel/alderlake: Enable CPPCv3
The patch defines the following helper functions:
get_cpu_scaling_factor(): Returns scaling factors of big and small core.
cpu_is_nominal_freq_supported(): Returns true if CPU supports Nominal
Frequency, otherwise false.
cpu_is_nominal_freq_supported(): Check CPU supports nominal frequency or
not.
The patch also enables CPPCv3 support for Intel Alder Lake which is
based on hybrid core architecture.
TEST=Verified Nominal Frequency and Nominal Performance are getting
updated for ADL-P small and big cores correctly.
Signed-off-by: Sridahr Siricilla <sridhar.siricilla@intel.com>
Change-Id: I963690a4fadad322095d202bcc08c92dcd845360
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59362
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'util/scripts/update_submodules')
0 files changed, 0 insertions, 0 deletions