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authorGaggery Tsai <gaggery.tsai@intel.com>2018-01-02 12:13:40 +0800
committerMartin Roth <martinroth@google.com>2018-01-12 18:21:15 +0000
commite1a75d4a94e32f72a5e99410cdaafef0431cfc8f (patch)
tree28665d87c08216c43cacf011e9f0fddc9e70dc9e /util/romcc
parent7c2a6f984a19cab6f2c51e5dce270562a8a27d47 (diff)
soc/intel/skylake: Override KBL IccMax settings
According to Intel document #559100 KBL EDS v2.8, section 7.2 DC specifications, the IccMax setting for KBL-U, KBL-U42 and Celeron/Pentium are different. This patch overrides the IccMax settings for KBL-U/R/Y since device tree could not handle all KBL-U/R combinations when multiple SKUs are adopted in a project. Besides, it is inefficient to maintain the same code for all variants. Hence, place it in the common code so that all variants could leverage the benefits. +----------------+-------------+---------------+------+-----+ | Domain/Setting | SA | IA | GTUS | GTS | +----------------+-------------+---------------+------+-----+ | IccMax(KBL-U/R)| 6A(U42) | 64A(U42) | 31A | 31A | | | 4.5A(Others)| 29A(Celeron) | | | | | | 32A(i3/i5) | | | +----------------+-------------+---------------+------+-----+ | IccMax(KBL-Y) | 4.1A | 24A | 24A | 24A | +----------------+-------------+---------------+------+-----+ BUG=b:71369428 BRANCH=None TEST=Remove icc_max setting from devicetree & emerge-fizz coreboot chromeos-bootimage & Ensure the KBL-U42, KBL-U22 and Celeron SKUs are identified correctly and IccMax settings are passed to FSPS correctly. Change-Id: I291462b73d3fbd17f17975de7fd77dc48ca99251 Signed-off-by: Gaggery Tsai <gaggery.tsai@intel.com> Reviewed-on: https://review.coreboot.org/23060 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
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