diff options
| author | Elyes HAOUAS <ehaouas@noos.fr> | 2018-08-23 18:24:32 +0200 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2018-08-28 14:22:24 +0000 |
| commit | 8fda8f4ac3541441df97d96f4969037ddffd2de7 (patch) | |
| tree | ec3591ade6fc5b4cfd5a782da65aedd81318afef /util/romcc/tests/linux_test2.c | |
| parent | 3db0198358e1b8101d78a7c785e4f4efde4fcaf9 (diff) | |
util/romcc: Fix typos
Change-Id: Ia9f0f1f527476900e6c54c60508600e16bea786f
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/28293
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'util/romcc/tests/linux_test2.c')
| -rw-r--r-- | util/romcc/tests/linux_test2.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/util/romcc/tests/linux_test2.c b/util/romcc/tests/linux_test2.c index 577e0c3c2a..c4fbf0a238 100644 --- a/util/romcc/tests/linux_test2.c +++ b/util/romcc/tests/linux_test2.c @@ -155,8 +155,8 @@ static void setup_coherent_ht_domain(void) * 0 = No coherent HT configuration space restrictions * 1 = Limit coherent HT configuration space based on node count * [16:16] Local Interrupt Conversion Enable. - * 0 = ExtInt/NMI interrups unaffected. - * 1 = ExtInt/NMI broadcat interrupts converted to LINT0/1 + * 0 = ExtInt/NMI interrupts unaffected. + * 1 = ExtInt/NMI broadcast interrupts converted to LINT0/1 * [17:17] APIC Extended Broadcast Enable. * 0 = APIC broadcast is 0F * 1 = APIC broadcast is FF @@ -484,7 +484,7 @@ static void setup_coherent_ht_domain(void) * 0 = CPU writes may be posted * 1 = CPU writes must be non-posted * [31: 8] Memory-Mapped I/O Limit Address i (39-16) - * This field defines the upp adddress bits of a 40-bit address that + * This field defines the upp address bits of a 40-bit address that * defines the end of a memory-mapped I/O region n */ PCI_ADDR(0, 0x18, 1, 0x84), 0x00000048, 0x00e1ff00, |