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author | Subrata Banik <subrata.banik@intel.com> | 2017-07-31 10:49:29 +0530 |
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committer | Martin Roth <martinroth@google.com> | 2017-08-03 20:30:19 +0000 |
commit | 5a752f7b8f66d66d65eb1ba2396930f5d0ef6450 (patch) | |
tree | f5457ee547ef088c63d166020b03fd16b34ef0a5 /util/romcc/test.sh | |
parent | d00d682670e1cf5c031a57274d7c4242f7a8193d (diff) |
soc/intel/apollolake: Skip disabled IGD device
If IGD PCI device is disabled:
1. BAR for the device will be 0.
2. There is no need to allocate framebuffer for this device.
Some early SOCs don't have GFX model fuse by default hence
we need to add a check to ensure PCI device is enable. This
code to avoid die inside coreboot for missing resources.
Change-Id: Ied677e8c77fa7b166b016da458caad0e4702b5d8
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/20830
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'util/romcc/test.sh')
0 files changed, 0 insertions, 0 deletions