diff options
| author | Eric Biederman <ebiederm@xmission.com> | 2003-10-11 06:20:25 +0000 |
|---|---|---|
| committer | Eric Biederman <ebiederm@xmission.com> | 2003-10-11 06:20:25 +0000 |
| commit | 83b991afff40e12a8b6756af06a472842edb1a66 (patch) | |
| tree | a441ff0d88afcb0a07cf22dc3653db3e07a05c98 /util/romcc/results/linux_test7.out | |
| parent | 080038bfbd8fdf08bac12476a3789495e6f705ca (diff) | |
- O2, enums, and switch statements work in romcc
- Support for compiling romcc on non x86 platforms
- new romc options -msse and -mmmx for specifying extra registers to use
- Bug fixes to device the device disable/enable framework and an amd8111 implementation
- Move the link specification to the chip specification instead of the path
- Allow specifying devices with internal bridges.
- Initial via epia support
- Opteron errata fixes
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1200 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'util/romcc/results/linux_test7.out')
| -rw-r--r-- | util/romcc/results/linux_test7.out | 32 |
1 files changed, 32 insertions, 0 deletions
diff --git a/util/romcc/results/linux_test7.out b/util/romcc/results/linux_test7.out new file mode 100644 index 0000000000..9d76d82734 --- /dev/null +++ b/util/romcc/results/linux_test7.out @@ -0,0 +1,32 @@ +val[00]: 0000c144 0000f8f8 00000000 +val[03]: 0000c14c 0000f8f8 00000001 +val[06]: 0000c154 0000f8f8 00000002 +val[09]: 0000c15c 0000f8f8 00000003 +val[0c]: 0000c164 0000f8f8 00000004 +val[0f]: 0000c16c 0000f8f8 00000005 +val[12]: 0000c174 0000f8f8 00000006 +val[15]: 0000c17c 0000f8f8 00000007 +val[00]: 0000c144 0000f8f8 00000000 +val[03]: 0000c14c 0000f8f8 00000001 +val[06]: 0000c154 0000f8f8 00000002 +val[09]: 0000c15c 0000f8f8 00000003 +val[0c]: 0000c164 0000f8f8 00000004 +val[0f]: 0000c16c 0000f8f8 00000005 +val[12]: 0000c174 0000f8f8 00000006 +val[15]: 0000c17c 0000f8f8 00000007 +val[00]: 0000c144 0000f8f8 00000000 +val[03]: 0000c14c 0000f8f8 00000001 +val[06]: 0000c154 0000f8f8 00000002 +val[09]: 0000c15c 0000f8f8 00000003 +val[0c]: 0000c164 0000f8f8 00000004 +val[0f]: 0000c16c 0000f8f8 00000005 +val[12]: 0000c174 0000f8f8 00000006 +val[15]: 0000c17c 0000f8f8 00000007 +val[00]: 0000c144 0000f8f8 00000000 +val[03]: 0000c14c 0000f8f8 00000001 +val[06]: 0000c154 0000f8f8 00000002 +val[09]: 0000c15c 0000f8f8 00000003 +val[0c]: 0000c164 0000f8f8 00000004 +val[0f]: 0000c16c 0000f8f8 00000005 +val[12]: 0000c174 0000f8f8 00000006 +val[15]: 0000c17c 0000f8f8 00000007 |