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| author | Arthur Heymans <arthur@aheymans.xyz> | 2021-05-05 14:45:28 +0200 |
|---|---|---|
| committer | Arthur Heymans <arthur@aheymans.xyz> | 2022-04-27 13:04:12 +0000 |
| commit | e69461dc25193bc792ba50b7d48081bdccd6e066 (patch) | |
| tree | c7c3c611a29b740fbfb0635110aa163547993ebe /util/riscv | |
| parent | 6afd3c1ceaba3a99ae4add821934ce6d04faa95d (diff) | |
nb/intel/pineview: Use cbfs mcache
There is plenty of cache available to increase DCACHE_RAM_SIZE to
allow the use of cbfs mcache.
Tested on Gigabyte GA-D510UD, still boots and resumes.
Change-Id: I1487ba9decd3aa22424a3ac111de7fbdb867d38d
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52941
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'util/riscv')
0 files changed, 0 insertions, 0 deletions