summaryrefslogtreecommitdiff
path: root/util/riscv
diff options
context:
space:
mode:
authorNick Vaccaro <nvaccaro@google.com>2020-11-24 21:40:50 +0000
committerPatrick Georgi <pgeorgi@google.com>2020-11-30 08:03:45 +0000
commitb38ca863d9a41dd6ab9881a00fe6eda8c5108e75 (patch)
tree11ec090b94792269b0bbb7e1a925378fe0579cc6 /util/riscv
parentace29dff9e96bc7868581deefea1840bc0857c6b (diff)
mb/google/volteer/variant/copano: Add memory part support
Add support for the following 5 LPDDR4x memory parts: - MT53E512M64D4NW-046 WT:E - H9HCNNNCRMBLPR-NEE - MT53D1G64D4NW-046 WT:A - H9HCNNNFBMBLPR-NEE - MT53D512M64D4NW-046 WT:F DRAM Part Name ID to assign ------------------------------------------- MT53E512M64D4NW-046 WT:E 0 (0000) H9HCNNNCRMBLPR-NEE 0 (0000) MT53D1G64D4NW-046 WT:A 1 (0001) H9HCNNNFBMBLPR-NEE 2 (0010) MT53D512M64D4NW-046 WT:F 0 (0000) BUG=b:172993397 TEST=none Change-Id: Iff8f6257c6cff77fc3f0bda7e75434f9f4de1777 Signed-off-by: Nick Vaccaro <nvaccaro@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47981 Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'util/riscv')
0 files changed, 0 insertions, 0 deletions