diff options
| author | Mike Banon <mikebdp2@gmail.com> | 2018-08-29 01:10:46 +0300 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2018-09-20 17:16:15 +0000 |
| commit | 843b9941632fea91227a7e46b0f083aa8d80b980 (patch) | |
| tree | b7992557f00fca91bf1ee1ebec117dade5510a34 /util/riscv | |
| parent | e209b96e53bfdee11444ab68eefc70b1f2a3469e (diff) | |
src/vendorcode/amd/agesa/f12: Update microcode to version 0x3000027 2011-09-13
This microcode update for CPU ID 0x300F10 should improve the system stability.
It is a part of microcode_amd.bin officially released by AMD at linux-firmware:
it starts at 0x217C offset, and size is 0x03C0 as specified priorly at 0x2178.
Old version: 0x300000F [2010-04-10]
replaced by
New version: 0x3000027 [2011-09-13]
Change-Id: I9650fab377d957904318ebb393323c2509cfea26
Signed-off-by: Mike Banon <mikebdp2@gmail.com>
Reviewed-on: https://review.coreboot.org/28378
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <martinroth@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'util/riscv')
0 files changed, 0 insertions, 0 deletions