diff options
| author | Martin Roth <martin@coreboot.org> | 2021-02-24 09:16:52 -0700 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2021-03-03 03:47:23 +0000 |
| commit | 4089ddb13c509c3fb4a77692c7cab5cd58f42baf (patch) | |
| tree | 3d298bd72a02af5631f400152d6a28c56c5b9666 /util/riscv | |
| parent | d5c8a15d741b72e6be6ba774f635f98b4aaa1832 (diff) | |
util/spd_tools/lp4x: Add 2 new parts to global memory definition
This adds the definitions for MT53E1G32D4NQ-046 WT:E used on Majolica,
and the NT6AP256T32AV-J1 part used on Guybrush.
BUG=b:178715165
TEST=Generate SPDs
Signed-off-by: Martin Roth <martin@coreboot.org>
Change-Id: I7cd729fc72d8f44a449429e97683b2ca1f560f2c
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51057
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com>
Diffstat (limited to 'util/riscv')
0 files changed, 0 insertions, 0 deletions