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| author | Mate Kukri <kukri.mate@gmail.com> | 2020-08-01 11:45:13 +0200 |
|---|---|---|
| committer | Angel Pons <th3fanbus@gmail.com> | 2020-08-03 11:16:02 +0000 |
| commit | e053493717c5c061720c5ee6d4ccda0cab4b5549 (patch) | |
| tree | 3e62e07dd827cd4fca0605186c1c77dcbdda8dab /util/riscv/sifive-gpt.py | |
| parent | ac01106743705b3f27901635c0ff6a45b78e0449 (diff) | |
soc/intel/baytrail: Add MRC SMBus workaround
- The Bay Trail MRC fails to read the SPDs from SMBus.
- Instead the SPDs are read into a buffer and the buffer is passed to
the MRC.
Change-Id: I7f560d950cb4e4d118f3ee17e6e19e14cd0cc193
Signed-off-by: Mate Kukri <kukri.mate@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44092
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'util/riscv/sifive-gpt.py')
0 files changed, 0 insertions, 0 deletions