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| author | Lee Leahy <leroy.p.leahy@intel.com> | 2016-02-14 14:33:45 -0800 |
|---|---|---|
| committer | Leroy P Leahy <leroy.p.leahy@intel.com> | 2016-02-18 20:35:58 +0100 |
| commit | b457649ef6ab163d30d9d38521c10124b59bdddc (patch) | |
| tree | fb97ec53e1692d12294b4718604c747768ca2cf5 /util/nvramtool/coreboot_tables.h | |
| parent | a95baf9f7f625d29a50c3e25f92f1118d6c626ab (diff) | |
soc/intel/quark: Enumerate the PCI devices
Add the chip and domain support which enables the display of the vendor
and device IDs for the PCI devices.
Testing on Galileo:
* Edit src/mainboard/intel/galileo/Makefile.inc file
* Add "select ADD_FSP_PDAT_FILE"
* Add "select ADD_FSP_RAW_BIN"
* Add "select ADD_RMU_FILE"
* Place the FSP.bin file in the location specified by CONFIG_FSP_FILE
* Place the pdat.bin files in the location specified by
CONFIG_FSP_PDAT_FILE
* Place the rmu.bin file in the location specified by CONFIG_RMU_FILE
* Testing is successful if:
* The PCI vendor and device IDs are displayed.
Change-Id: I517dcafd83c7dd850bc3471f939d6804a05020c3
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: https://review.coreboot.org/13719
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'util/nvramtool/coreboot_tables.h')
0 files changed, 0 insertions, 0 deletions