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| author | Martin Roth <martinroth@google.com> | 2019-08-27 15:49:27 -0600 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-08-30 10:41:24 +0000 |
| commit | d12d25227f54ab19a09d064421a9832fa4d9d851 (patch) | |
| tree | 6e3eba6c0aa948d3b2779e0c7635f3cc2a8c6dc3 /util/nvramtool/cmos_lowlevel.h | |
| parent | c6f2b6135596c43f4bf467f7b6372b0ad3927e2c (diff) | |
ec/google/chromeec: Add config option for eSPI
The Intel platforms using eSPI EC communication have just been enabling
the EC_GOOGLE_CHROMEEC_LPC option for simplicity. This does basically
the same, but at least marks it as eSPI in Kconfig for clarity.
BUG=b:140055300
TEST=Build tested only.
Change-Id: Ib56ec9d1dc204809a05c846494ff0e0d69cf70ea
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35128
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Mathew King <mathewk@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'util/nvramtool/cmos_lowlevel.h')
0 files changed, 0 insertions, 0 deletions