summaryrefslogtreecommitdiff
path: root/util/msrtool/intel_core2_later.c
diff options
context:
space:
mode:
authorNico Huber <nico.h@gmx.de>2020-10-04 16:19:57 +0200
committerNico Huber <nico.h@gmx.de>2020-10-29 00:01:40 +0000
commit394bd94e0cc15ee238bc7e8088257904f12a06ef (patch)
tree8ac89de8016528f76a8f170d1748c32fe0f44385 /util/msrtool/intel_core2_later.c
parent0082a3e59e30aa4a92146dad05c58553cd4ee197 (diff)
mb/asus/f2a85-m_pro: Clean up super-I/O GPIO settings
Drop useless writes to read-only registers and don't re-write default 0x00 values. In detail: * Don't write read-only status registers. * Don't try to write input bits in data registers (iow. mask data values: `data &= ~io`). * Don't write data registers if all GPIOs are set as inputs (`io == 0xff`). * Don't write default 0x00 for inversion and multiplex registers. Note: Both GPIO0 and WDT1 values look spurious. Maybe they were dumped with the virtual devices disabled? Change-Id: I7d948d6b697285e61e4352b7354b924dbf511e9a Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/46020 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'util/msrtool/intel_core2_later.c')
0 files changed, 0 insertions, 0 deletions