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authorPaul Fagerburg <pfagerburg@google.com>2020-03-11 14:48:30 -0700
committerMartin Roth <martinroth@google.com>2020-03-14 23:41:14 +0000
commit6e5693386ba94ebf05015e7cbcc7dd482119c8e4 (patch)
tree6fc645f937db710dc310644b0cdf2ad8a0d0806d /util/mainboard
parentf354c8c6258aa30c545c78c454c2e174b19abeae (diff)
coreboot: add Volteer template files
Add template files for making a new barebones-copy of Volteer. BUG=b:147483699 BRANCH=None TEST=N/A Change-Id: I8cc69b8ce7dbc6809de058019bdc466a060069e7 Signed-off-by: Nick Vaccaro <nvaccaro@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/39462 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
Diffstat (limited to 'util/mainboard')
-rw-r--r--util/mainboard/google/volteer/template/Makefile.inc3
-rw-r--r--util/mainboard/google/volteer/template/include/variant/ec.h23
-rw-r--r--util/mainboard/google/volteer/template/include/variant/gpio.h30
-rw-r--r--util/mainboard/google/volteer/template/overridetree.cb6
4 files changed, 62 insertions, 0 deletions
diff --git a/util/mainboard/google/volteer/template/Makefile.inc b/util/mainboard/google/volteer/template/Makefile.inc
index 38cf728d8f..f130808dfa 100644
--- a/util/mainboard/google/volteer/template/Makefile.inc
+++ b/util/mainboard/google/volteer/template/Makefile.inc
@@ -1,5 +1,8 @@
+##
## This file is part of the coreboot project.
##
+## Copyright 2020 Google LLC
+##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; version 2 of the License.
diff --git a/util/mainboard/google/volteer/template/include/variant/ec.h b/util/mainboard/google/volteer/template/include/variant/ec.h
new file mode 100644
index 0000000000..5d3278f445
--- /dev/null
+++ b/util/mainboard/google/volteer/template/include/variant/ec.h
@@ -0,0 +1,23 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2020 Google LLC
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+
+#ifndef __VARIANT_EC_H__
+#define __VARIANT_EC_H__
+
+#include <baseboard/ec.h>
+
+#endif
diff --git a/util/mainboard/google/volteer/template/include/variant/gpio.h b/util/mainboard/google/volteer/template/include/variant/gpio.h
new file mode 100644
index 0000000000..ad4d68bfd1
--- /dev/null
+++ b/util/mainboard/google/volteer/template/include/variant/gpio.h
@@ -0,0 +1,30 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2020 Google LLC
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.See the
+ * GNU General Public License for more details.
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+
+#ifndef VARIANT_GPIO_H
+#define VARIANT_GPIO_H
+
+#include <baseboard/gpio.h>
+
+/* Memory configuration board straps */
+/* Copied from baseboard and may need to change for the new variant. */
+#define GPIO_MEM_CONFIG_0 GPP_C12
+#define GPIO_MEM_CONFIG_1 GPP_C15
+#define GPIO_MEM_CONFIG_2 GPP_C14
+#define GPIO_MEM_CONFIG_3 GPP_D15
+
+#endif
diff --git a/util/mainboard/google/volteer/template/overridetree.cb b/util/mainboard/google/volteer/template/overridetree.cb
new file mode 100644
index 0000000000..32204c58e7
--- /dev/null
+++ b/util/mainboard/google/volteer/template/overridetree.cb
@@ -0,0 +1,6 @@
+chip soc/intel/tigerlake
+
+ device domain 0 on
+ end
+
+end