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authorPaul Fagerburg <pfagerburg@google.com>2020-11-27 12:11:33 -0700
committerPaul Fagerburg <pfagerburg@chromium.org>2020-12-01 01:25:17 +0000
commit679b236bedd42d4a97a15d108b605ae8d4e5ee9a (patch)
tree2db1dc6093d39b26fb9950fa3671b11e9a43363d /util/mainboard
parent617150e0ff5b84b531e88e89d5ab7d3f93636434 (diff)
util/mb/google/puff: remove HECI from overridetree
The template for overridetree.cb includes HeciEnabled, which has been removed from the CNL config struct, so remove it from the overridetree. BUG=b:174360951 TEST=`new_variant_fulltest.sh puff` succeeds Signed-off-by: Paul Fagerburg <pfagerburg@google.com> Change-Id: I87f67c53cc75d9ddd40b4960739180a95de6ecd6 Reviewed-on: https://review.coreboot.org/c/coreboot/+/48129 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Diffstat (limited to 'util/mainboard')
-rw-r--r--util/mainboard/google/puff/template/overridetree.cb3
1 files changed, 0 insertions, 3 deletions
diff --git a/util/mainboard/google/puff/template/overridetree.cb b/util/mainboard/google/puff/template/overridetree.cb
index adb00e485f..a30dad0cdb 100644
--- a/util/mainboard/google/puff/template/overridetree.cb
+++ b/util/mainboard/google/puff/template/overridetree.cb
@@ -1,7 +1,4 @@
chip soc/intel/cannonlake
- # Enable heci communication
- register "HeciEnabled" = "1"
-
# Auto-switch between X4 NVMe and X2 NVMe.
register "TetonGlacierMode" = "1"