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authorJian Tong <tongjian@huaqin.corp-partner.google.com>2024-09-02 14:26:00 +0800
committerFelix Held <felix-coreboot@felixheld.de>2024-09-06 13:15:05 +0000
commitd1243fcaad224c90136796b1080712930bcb06f1 (patch)
treef5e66484a5c792c90174502965adc52b2a01fded /util/kbc1126/.gitignore
parent4e1ed767ab26deccc7b1b65b5b556d693dd6053e (diff)
mb/google/brox/var/lotso: disable RTS5227 PCIE L0s support
Power consumption according to RTS5227 datasheet section 6.4, L0s is not supported, so set it to ASPM_L1. lspci -vvvv -s 01:00 to verify LnkCtl: ASPM L1 Enabled. BUG=b:359409425 TEST=emerge-brox sys-boot/coreboot sys-boot/chromeos-bootimage Change-Id: I87bb0d195566d273951dee6eeb54c9b388dd7607 Signed-off-by: Jian Tong <tongjian@huaqin.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/84177 Reviewed-by: Kun Liu <liukun11@huaqin.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
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