diff options
| author | Christian Walter <christian.walter@9elements.com> | 2022-09-08 11:44:19 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2023-01-24 12:47:30 +0000 |
| commit | 1364ac3478c69affce32840d92577f5a8da2eb8c (patch) | |
| tree | 5c6d30b6831ee3f2bbd806e3d954448022836859 /util/inteltool/gpio.c | |
| parent | b53e27bc2495ca5b5ba6b84d3a6768d9ad380a93 (diff) | |
util/inteltool: add support for EBG (Emmitsburg) PCH
EBG (Emmitsburg) PCH is used in Intel SPR-SP chipset.
Its datasheet is Intel doc# 606161.
Add Intel Emmitsburg PCH GPIO pin definitions.
Also common code change is made to support Intel Emmitsburg PCH:
a. Instead of 2 PAD registers per GPIO, it has 4 PAD registers.
b. The register address space may not be contiguous from one GPIO
group to the next GPIO group.
Change-Id: Ia0d9179544020b6abb0be1ecd275a9a46356db8a
Signed-off-by: Jonathan Zhang <jonzhang@meta.com>
Signed-off-by: Christian Walter <christian.walter@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/71943
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
Diffstat (limited to 'util/inteltool/gpio.c')
| -rw-r--r-- | util/inteltool/gpio.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/util/inteltool/gpio.c b/util/inteltool/gpio.c index e219d00e05..bf4156c138 100644 --- a/util/inteltool/gpio.c +++ b/util/inteltool/gpio.c @@ -1115,6 +1115,7 @@ int print_gpios(struct pci_dev *sb, int show_all, int show_diffs) case PCI_DEVICE_ID_INTEL_ADL_M: case PCI_DEVICE_ID_INTEL_RPL_P: case PCI_DEVICE_ID_INTEL_EHL: + case PCI_DEVICE_ID_INTEL_EBG: print_gpio_groups(sb); return 0; case PCI_DEVICE_ID_INTEL_82371XX: |