util/intelp2m: Add Intel Pad to Macro utility

This patch adds a new utility for converting a pad configuration from
the inteltool dump to the PAD_CFG_*() macros [1] for coreboot and GPIO
config data structures for FSP/sdk2-platforms/slimbootloader [2,3].
Mirror: https://github.com/maxpoliak/pch-pads-parser.git

[1] src/soc/intel/common/block/include/intelblocks/gpio_defs.h
[2] https://slimbootloader.github.io/tools/index.html#gpio-tool
[3] 3rdparty/fsp/CometLakeFspBinPkg/CometLake1/Include/GpioSampleDef.h

Change-Id: If3e3b523c4f63dc2f91e9ccd16934e3a1b6e21fa
Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35643
Reviewed-by: Andrey Petrov <andrey.petrov@gmail.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

8 files changed, 1482 insertions, 0 deletions

diff --git a/util/intelp2m/platforms/apl/macro.go b/util/intelp2m/platforms/apl/macro.go
new file mode 100644
index 0000000000..4288fa448d
--- /dev/null
+++ b/util/intelp2m/platforms/apl/macro.go
@@ -0,0 +1,329 @@
+package apl
+
+import "fmt"
+import "strconv"
+
+// Local packages
+import "../common"
+import "../../config"
+import "../../fields"
+
+const (
+	PAD_CFG_DW0_RO_FIELDS = (0x1 << 27) | (0x1 << 24) | (0x3 << 21) | (0xf << 16) | 0xfc
+	PAD_CFG_DW1_RO_FIELDS = 0xfffc00ff
+)
+
+const (
+	PAD_CFG_DW0 = common.PAD_CFG_DW0
+	PAD_CFG_DW1 = common.PAD_CFG_DW1
+	MAX_DW_NUM  = common.MAX_DW_NUM
+)
+
+const (
+	PULL_NONE    = 0x0  // 0 000: none
+	PULL_DN_5K   = 0x2  // 0 010: 5k wpd (Only available on SMBus GPIOs)
+	PULL_DN_20K  = 0x4  // 0 100: 20k wpd
+	// PULL_NONE = 0x8  // 1 000: none
+	PULL_UP_1K   = 0x9  // 1 001: 1k wpu (Only available on I2C GPIOs)
+	PULL_UP_2K   = 0xb  // 1 011: 2k wpu (Only available on I2C GPIOs)
+	PULL_UP_20K  = 0xc  // 1 100: 20k wpu
+	PULL_UP_667  = 0xd  // 1 101: 1k & 2k wpu (Only available on I2C GPIOs)
+	PULL_NATIVE  = 0xf  // 1 111: (optional) Native controller selected by Pad Mode
+)
+
+type PlatformSpecific struct {}
+
+// RemmapRstSrc - remmap Pad Reset Source Config
+// remmap is not required because it is the same as common.
+func (PlatformSpecific) RemmapRstSrc() {}
+
+// Adds the PADRSTCFG parameter from DW0 to the macro as a new argument
+// return: macro
+func (PlatformSpecific) Rstsrc() {
+	macro := common.GetMacro()
+	dw0 := macro.Register(PAD_CFG_DW0)
+	// See src/soc/intel/apollolake/gpio_apl.c:
+	// static const struct reset_mapping rst_map[] = {
+	// { .logical = PAD_CFG0_LOGICAL_RESET_PWROK,  .chipset = 0U << 30 },
+	// { .logical = PAD_CFG0_LOGICAL_RESET_DEEP,   .chipset = 1U << 30 },
+	// { .logical = PAD_CFG0_LOGICAL_RESET_PLTRST, .chipset = 2U << 30 },
+	// };
+
+	var resetsrc = map[uint8]string{
+		0: "PWROK",
+		1: "DEEP",
+		2: "PLTRST",
+	}
+	str, valid := resetsrc[dw0.GetResetConfig()]
+	if !valid {
+			// 3h = Reserved (implement as setting 0h)
+			dw0.CntrMaskFieldsClear(common.PadRstCfgMask)
+			str = "PWROK"
+	}
+	macro.Separator().Add(str)
+}
+
+// Adds The Pad Termination (TERM) parameter from DW1 to the macro as a new argument
+// return: macro
+func (PlatformSpecific) Pull() {
+	macro := common.GetMacro()
+	dw1 := macro.Register(PAD_CFG_DW1)
+	var pull = map[uint8]string{
+		PULL_NONE:   "NONE",
+		PULL_DN_5K:  "DN_5K",
+		PULL_DN_20K: "DN_20K",
+		PULL_UP_1K:  "UP_1K",
+		PULL_UP_2K:  "UP_2K",
+		PULL_UP_20K: "UP_20K",
+		PULL_UP_667: "UP_667",
+		PULL_NATIVE: "NATIVE",
+
+	}
+	terminationFieldValue := dw1.GetTermination()
+	str, valid := pull[terminationFieldValue]
+	if !valid {
+		str = strconv.Itoa(int(terminationFieldValue))
+		fmt.Println("Error", macro.PadIdGet(), " invalid TERM value = ", str)
+	}
+	macro.Separator().Add(str)
+}
+
+// Generate macro to cause peripheral IRQ when configured in GPIO input mode
+func ioApicRoute() bool {
+	macro := common.GetMacro()
+	dw0 := macro.Register(PAD_CFG_DW0)
+	dw1 := macro.Register(PAD_CFG_DW1)
+	if dw0.GetGPIOInputRouteIOxAPIC() == 0 {
+		return false
+	}
+	macro.Add("_APIC")
+	if dw1.GetIOStandbyState() != 0 || dw1.GetIOStandbyTermination() != 0 {
+		// e.g. H1_PCH_INT_ODL
+		// PAD_CFG_GPI_APIC_IOS(GPIO_63, NONE, DEEP, LEVEL, INVERT, TxDRxE, DISPUPD),
+		macro.Add("_IOS(").Id().Pull().Rstsrc().Trig().Invert().IOSstate().IOTerm()
+	} else {
+		// PAD_CFG_GPI_APIC(pad, pull, rst, trig, inv)
+		macro.Add("(").Id().Pull().Rstsrc().Trig().Invert().Add("),")
+	}
+	macro.Add("),")
+	return true
+}
+
+// Generate macro to cause NMI when configured in GPIO input mode
+func nmiRoute() bool {
+	macro := common.GetMacro()
+	if macro.Register(PAD_CFG_DW0).GetGPIOInputRouteNMI() == 0 {
+		return false
+	}
+	// e.g. PAD_CFG_GPI_NMI(GPIO_24, UP_20K, DEEP, LEVEL, INVERT),
+	macro.Add("_NMI").Add("(").Id().Pull().Rstsrc().Trig().Invert().Add("),")
+	return true
+}
+
+// Generate macro to cause SCI when configured in GPIO input mode
+func sciRoute() bool {
+	macro := common.GetMacro()
+	dw0 := macro.Register(PAD_CFG_DW0)
+	dw1 := macro.Register(PAD_CFG_DW0)
+	if dw0.GetGPIOInputRouteSCI() == 0 {
+		return false
+	}
+	if dw1.GetIOStandbyState() != 0 || dw1.GetIOStandbyTermination() != 0 {
+		// PAD_CFG_GPI_SCI_IOS(GPIO_141, NONE, DEEP, EDGE_SINGLE, INVERT, IGNORE, DISPUPD),
+		macro.Add("_SCI_IOS")
+		macro.Add("(").Id().Pull().Rstsrc().Trig().Invert().IOSstate().IOTerm()
+	} else if dw0.GetRXLevelEdgeConfiguration() & 0x1 != 0 {
+		// e.g. PAD_CFG_GPI_ACPI_SCI(GPP_G2, NONE, DEEP, YES),
+		macro.Add("_ACPI_SCI").Add("(").Id().Pull().Rstsrc().Invert()
+	} else {
+		// e.g. PAD_CFG_GPI_SCI(GPP_B18, UP_20K, PLTRST, LEVEL, INVERT),
+		macro.Add("_SCI").Add("(").Id().Pull().Rstsrc().Trig().Invert()
+	}
+	macro.Add("),")
+	return true
+}
+
+// Generate macro to cause SMI when configured in GPIO input mode
+func smiRoute() bool {
+	macro := common.GetMacro()
+	dw0 := macro.Register(PAD_CFG_DW0)
+	dw1 := macro.Register(PAD_CFG_DW1)
+	if dw0.GetGPIOInputRouteSMI() == 0 {
+		return false
+	}
+	if dw1.GetIOStandbyState() != 0 || dw1.GetIOStandbyTermination() != 0 {
+		// PAD_CFG_GPI_SMI_IOS(GPIO_41, UP_20K, DEEP, EDGE_SINGLE, NONE, IGNORE, SAME),
+		macro.Add("_SMI_IOS")
+		macro.Add("(").Id().Pull().Rstsrc().Trig().Invert().IOSstate().IOTerm()
+	} else if dw0.GetRXLevelEdgeConfiguration() & 0x1 != 0 {
+		// e.g. PAD_CFG_GPI_ACPI_SMI(GPP_I3, NONE, DEEP, YES),
+		macro.Add("_ACPI_SMI").Add("(").Id().Pull().Rstsrc().Invert()
+	} else {
+		// e.g. PAD_CFG_GPI_SMI(GPP_E3, NONE, PLTRST, EDGE_SINGLE, NONE),
+		macro.Add("_SMI").Add("(").Id().Pull().Rstsrc().Trig().Invert()
+	}
+	macro.Add("),")
+	return true
+}
+
+// Generate macro for GPI port
+func (PlatformSpecific) GpiMacroAdd() {
+	macro := common.GetMacro()
+	var ids []string
+	macro.Set("PAD_CFG_GPI")
+	for routeid, isRoute := range map[string]func() (bool) {
+		"IOAPIC": ioApicRoute,
+		"SCI":    sciRoute,
+		"SMI":    smiRoute,
+		"NMI":    nmiRoute,
+	} {
+		if isRoute() {
+			ids = append(ids, routeid)
+		}
+	}
+
+	switch argc := len(ids); argc {
+	case 0:
+		dw1 := macro.Register(PAD_CFG_DW1)
+		isIOStandbyStateUsed := dw1.GetIOStandbyState() != 0
+		isIOStandbyTerminationUsed := dw1.GetIOStandbyTermination() != 0
+		if isIOStandbyStateUsed && !isIOStandbyTerminationUsed {
+			macro.Add("_TRIG_IOSSTATE_OWN(")
+			// PAD_CFG_GPI_TRIG_IOSSTATE_OWN(pad, pull, rst, trig, iosstate, own)
+			macro.Id().Pull().Rstsrc().Trig().IOSstate().Own().Add("),")
+		} else if isIOStandbyTerminationUsed {
+			macro.Add("_TRIG_IOS_OWN(")
+			// PAD_CFG_GPI_TRIG_IOS_OWN(pad, pull, rst, trig, iosstate, iosterm, own)
+			macro.Id().Pull().Rstsrc().Trig().IOSstate().IOTerm().Own().Add("),")
+		} else {
+			// PAD_CFG_GPI_TRIG_OWN(pad, pull, rst, trig, own)
+			macro.Add("_TRIG_OWN(").Id().Pull().Rstsrc().Trig().Own().Add("),")
+		}
+	case 1:
+		// GPI with IRQ route
+		if config.AreFieldsIgnored() {
+			macro.SetPadOwnership(common.PAD_OWN_ACPI)
+		}
+	case 2:
+		// PAD_CFG_GPI_DUAL_ROUTE(pad, pull, rst, trig, inv, route1, route2)
+		macro.Set("PAD_CFG_GPI_DUAL_ROUTE(").Id().Pull().Rstsrc().Trig().Invert()
+		macro.Add(", " + ids[0] + ", " + ids[1] + "),")
+		if config.AreFieldsIgnored() {
+			macro.SetPadOwnership(common.PAD_OWN_ACPI)
+		}
+	default:
+		// Clear the control mask so that the check fails and "Advanced" macro is
+		// generated
+		macro.Register(PAD_CFG_DW0).CntrMaskFieldsClear(common.AllFields)
+	}
+}
+
+
+// Adds PAD_CFG_GPO macro with arguments
+func (PlatformSpecific) GpoMacroAdd() {
+	macro := common.GetMacro()
+	dw0 :=  macro.Register(PAD_CFG_DW0)
+	dw1 :=  macro.Register(PAD_CFG_DW1)
+	term := dw1.GetTermination()
+
+	macro.Set("PAD_CFG")
+	if dw1.GetIOStandbyState() != 0 || dw1.GetIOStandbyTermination() != 0 {
+		// PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_91, 0, DEEP, NONE, Tx0RxDCRx0, DISPUPD),
+		// PAD_CFG_GPO_IOSSTATE_IOSTERM(pad, val, rst, pull, iosstate, ioterm)
+		macro.Add("_GPO_IOSSTATE_IOSTERM(").Id().Val().Rstsrc().Pull().IOSstate().IOTerm()
+	} else {
+		if term != 0 {
+			// e.g. PAD_CFG_TERM_GPO(GPP_B23, 1, DN_20K, DEEP),
+			// PAD_CFG_TERM_GPO(pad, val, pull, rst)
+			macro.Add("_TERM")
+		}
+		macro.Add("_GPO(").Id().Val()
+		if term != 0 {
+			macro.Pull()
+		}
+		macro.Rstsrc()
+	}
+	macro.Add("),")
+
+	if dw0.GetRXLevelEdgeConfiguration() != common.TRIG_OFF {
+		// ignore if trig = OFF is not set
+		dw0.CntrMaskFieldsClear(common.RxLevelEdgeConfigurationMask)
+	}
+}
+
+// Adds PAD_CFG_NF macro with arguments
+func (PlatformSpecific) NativeFunctionMacroAdd() {
+	macro := common.GetMacro()
+	dw1 := macro.Register(PAD_CFG_DW1)
+	isIOStandbyStateUsed := dw1.GetIOStandbyState() != 0
+	isIOStandbyTerminationUsed := dw1.GetIOStandbyTermination() != 0
+
+	macro.Set("PAD_CFG_NF")
+	if !isIOStandbyTerminationUsed && isIOStandbyStateUsed {
+		if dw1.GetIOStandbyState() == common.StandbyIgnore {
+			// PAD_CFG_NF_IOSTANDBY_IGNORE(PMU_SLP_S0_B, NONE, DEEP, NF1),
+			macro.Add("_IOSTANDBY_IGNORE(").Id().Pull().Rstsrc().Padfn()
+		} else {
+			// PAD_CFG_NF_IOSSTATE(GPIO_22, UP_20K, DEEP, NF2, TxDRxE),
+			macro.Add("_IOSSTATE(").Id().Pull().Rstsrc().Padfn().IOSstate()
+		}
+	} else if isIOStandbyTerminationUsed {
+		// PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_103, NATIVE, DEEP, NF1, MASK, SAME),
+		macro.Add("_IOSSTATE_IOSTERM(").Id().Pull().Rstsrc().Padfn().IOSstate().IOTerm()
+	} else {
+		// e.g. PAD_CFG_NF(GPP_D23, NONE, DEEP, NF1)
+		macro.Add("(").Id().Pull().Rstsrc().Padfn()
+	}
+	macro.Add("),")
+
+	if dw0 := macro.Register(PAD_CFG_DW0); dw0.GetGPIORxTxDisableStatus() != 0 {
+		// Since the bufbis parameter will be ignored for NF, we should clear
+		// the corresponding bits in the control mask.
+		dw0.CntrMaskFieldsClear(common.RxTxBufDisableMask)
+	}
+}
+
+// Adds PAD_NC macro
+func (PlatformSpecific) NoConnMacroAdd() {
+	macro := common.GetMacro()
+	dw1 := macro.Register(PAD_CFG_DW1)
+
+	if dw1.GetIOStandbyState() == common.TxDRxE {
+		dw0 := macro.Register(PAD_CFG_DW0)
+
+		// See comments in sunrise/macro.go : NoConnMacroAdd()
+		if dw0.GetRXLevelEdgeConfiguration() != common.TRIG_OFF {
+			dw0.CntrMaskFieldsClear(common.RxLevelEdgeConfigurationMask)
+		}
+		if dw0.GetResetConfig() != 1 { // 1 = RST_DEEP
+			dw0.CntrMaskFieldsClear(common.PadRstCfgMask)
+		}
+
+		// PAD_NC(OSC_CLK_OUT_1, DN_20K)
+		macro.Set("PAD_NC").Add("(").Id().Pull().Add("),")
+		return
+	}
+	// PAD_CFG_GPIO_HI_Z(GPIO_81, UP_20K, DEEP, HIZCRx0, DISPUPD),
+	macro.Set("PAD_CFG_GPIO_")
+	if macro.IsOwnershipDriver() {
+		// PAD_CFG_GPIO_DRIVER_HI_Z(GPIO_55, UP_20K, DEEP, HIZCRx1, ENPU),
+		macro.Add("DRIVER_")
+	}
+	macro.Add("HI_Z(").Id().Pull().Rstsrc().IOSstate().IOTerm().Add("),")
+}
+
+// GenMacro - generate pad macro
+// dw0 : DW0 config register value
+// dw1 : DW1 config register value
+// return: string of macro
+//         error
+func (PlatformSpecific) GenMacro(id string, dw0 uint32, dw1 uint32, ownership uint8) string {
+	macro := common.GetInstanceMacro(PlatformSpecific{}, fields.InterfaceGet())
+	// use platform-specific interface in Macro struct
+	macro.PadIdSet(id).SetPadOwnership(ownership)
+	macro.Register(PAD_CFG_DW0).CntrMaskFieldsClear(common.AllFields)
+	macro.Register(PAD_CFG_DW0).CntrMaskFieldsClear(common.AllFields)
+	macro.Register(PAD_CFG_DW0).ValueSet(dw0).ReadOnlyFieldsSet(PAD_CFG_DW0_RO_FIELDS)
+	macro.Register(PAD_CFG_DW1).ValueSet(dw1).ReadOnlyFieldsSet(PAD_CFG_DW1_RO_FIELDS)
+	return macro.Generate()
+}
diff --git a/util/intelp2m/platforms/apl/template.go b/util/intelp2m/platforms/apl/template.go
new file mode 100644
index 0000000000..5944727cd6
--- /dev/null
+++ b/util/intelp2m/platforms/apl/template.go
@@ -0,0 +1,35 @@
+package apl
+
+import "strings"
+
+// GroupNameExtract - This function extracts the group ID, if it exists in a row
+// line      : string from the configuration file
+// return
+//     bool   : true if the string contains a group identifier
+//     string : group identifier
+func (PlatformSpecific) GroupNameExtract(line string) (bool, string) {
+	// Not supported
+	return false, ""
+}
+
+// KeywordCheck - This function is used to filter parsed lines of the configuration file and
+//                returns true if the keyword is contained in the line.
+// line      : string from the configuration file
+func (PlatformSpecific) KeywordCheck(line string) bool {
+	for _, keyword := range []string{
+		"GPIO_", "TCK", "TRST_B", "TMS", "TDI", "CX_PMODE", "CX_PREQ_B", "JTAGX", "CX_PRDY_B",
+		"TDO", "CNV_BRI_DT", "CNV_BRI_RSP", "CNV_RGI_DT", "CNV_RGI_RSP", "SVID0_ALERT_B",
+		"SVID0_DATA", "SVID0_CLK", "PMC_SPI_FS", "PMC_SPI_RXD", "PMC_SPI_TXD", "PMC_SPI_CLK",
+		"PMIC_PWRGOOD", "PMIC_RESET_B", "PMIC_THERMTRIP_B", "PMIC_STDBY", "PROCHOT_B",
+		"PMIC_I2C_SCL", "PMIC_I2C_SDA", "FST_SPI_CLK_FB", "OSC_CLK_OUT_", "PMU_AC_PRESENT",
+		"PMU_BATLOW_B", "PMU_PLTRST_B", "PMU_PWRBTN_B", "PMU_RESETBUTTON_B", "PMU_SLP_S0_B",
+		"PMU_SLP_S3_B", "PMU_SLP_S4_B", "PMU_SUSCLK", "PMU_WAKE_B", "SUS_STAT_B", "SUSPWRDNACK",
+		"SMB_ALERTB", "SMB_CLK", "SMB_DATA", "LPC_ILB_SERIRQ", "LPC_CLKOUT", "LPC_AD", "LPC_CLKRUNB",
+		"LPC_FRAMEB",
+	} {
+		if strings.Contains(line, keyword) {
+			return true
+		}
+	}
+	return false
+}
diff --git a/util/intelp2m/platforms/common/macro.go b/util/intelp2m/platforms/common/macro.go
new file mode 100644
index 0000000000..e30ef225fe
--- /dev/null
+++ b/util/intelp2m/platforms/common/macro.go
@@ -0,0 +1,417 @@
+package common
+
+import "strconv"
+import "sync"
+
+import "../../config"
+
+type Fields interface {
+	DecodeDW0()
+	DecodeDW1()
+	GenerateString()
+}
+
+const (
+	PAD_OWN_ACPI   = 0
+	PAD_OWN_DRIVER = 1
+)
+
+const (
+	TxLASTRxE     = 0x0
+	Tx0RxDCRx0    = 0x1
+	Tx0RxDCRx1    = 0x2
+	Tx1RxDCRx0    = 0x3
+	Tx1RxDCRx1    = 0x4
+	Tx0RxE        = 0x5
+	Tx1RxE        = 0x6
+	HIZCRx0       = 0x7
+	HIZCRx1       = 0x8
+	TxDRxE        = 0x9
+	StandbyIgnore = 0xf
+)
+
+const (
+	IOSTERM_SAME	= 0x0
+	IOSTERM_DISPUPD	= 0x1
+	IOSTERM_ENPD	= 0x2
+	IOSTERM_ENPU    = 0x3
+)
+
+const (
+	TRIG_LEVEL       = 0
+	TRIG_EDGE_SINGLE = 1
+	TRIG_OFF         = 2
+	TRIG_EDGE_BOTH   = 3
+)
+
+const (
+	RST_PWROK  = 0
+	RST_DEEP   = 1
+	RST_PLTRST = 2
+	RST_RSMRST = 3
+)
+
+// PlatformSpecific - platform-specific interface
+type PlatformSpecific interface {
+	RemmapRstSrc()
+	Pull()
+	GpiMacroAdd()
+	GpoMacroAdd()
+	NativeFunctionMacroAdd()
+	NoConnMacroAdd()
+}
+
+// Macro - contains macro information and methods
+// Platform : platform-specific interface
+// padID    : pad ID string
+// str      : macro string entirely
+// Reg      : structure of configuration register values and their masks
+type Macro struct {
+	Platform  PlatformSpecific
+	Reg       [MAX_DW_NUM]Register
+	padID     string
+	str       string
+	ownership uint8
+	Fields
+}
+
+var	instanceMacro *Macro
+var	once           sync.Once
+
+// GetInstance returns singleton
+func GetInstanceMacro(p PlatformSpecific, f Fields) *Macro {
+	once.Do(func() {
+		instanceMacro = &Macro{ Platform : p, Fields : f }
+	})
+	return instanceMacro
+}
+
+func GetMacro() *Macro {
+	return GetInstanceMacro(nil, nil)
+}
+
+func (macro *Macro) PadIdGet() string {
+	return macro.padID
+}
+
+func (macro *Macro) PadIdSet(padid string) *Macro {
+	macro.padID = padid
+	return macro
+}
+
+func (macro *Macro) SetPadOwnership(own uint8) *Macro {
+	macro.ownership = own
+	return macro
+}
+
+func (macro *Macro) IsOwnershipDriver() bool {
+	return macro.ownership == PAD_OWN_DRIVER
+}
+
+// returns <Register> data configuration structure
+// number : register number
+func (macro *Macro) Register(number uint8) *Register {
+	return &macro.Reg[number]
+}
+
+// add a string to macro
+func (macro *Macro) Add(str string) *Macro {
+	macro.str += str
+	return macro
+}
+
+// set a string in a macro instead of its previous contents
+func (macro *Macro) Set(str string) *Macro {
+	macro.str = str
+	return macro
+}
+
+// get macro string
+func (macro *Macro) Get() string {
+	return macro.str
+}
+
+// set a string in a macro instead of its previous contents
+func (macro *Macro) Clear() *Macro {
+	macro.Set("")
+	return macro
+}
+
+// Adds PAD Id to the macro as a new argument
+// return: Macro
+func (macro *Macro) Id() *Macro {
+	return macro.Add(macro.padID)
+}
+
+// Add Separator to macro if needed
+func (macro *Macro) Separator() *Macro {
+	str := macro.Get()
+	c := str[len(str)-1]
+	if c != '(' && c != '_' {
+		macro.Add(", ")
+	}
+	return macro
+}
+
+// Adds the PADRSTCFG parameter from DW0 to the macro as a new argument
+// return: Macro
+func (macro *Macro) Rstsrc() *Macro {
+	dw0 := macro.Register(PAD_CFG_DW0)
+	var resetsrc = map[uint8]string {
+		0: "PWROK",
+		1: "DEEP",
+		2: "PLTRST",
+		3: "RSMRST",
+	}
+	return macro.Separator().Add(resetsrc[dw0.GetResetConfig()])
+}
+
+// Adds The Pad Termination (TERM) parameter from DW1 to the macro as a new argument
+// return: Macro
+func (macro *Macro) Pull() *Macro {
+	macro.Platform.Pull()
+	return macro
+}
+
+// Adds Pad GPO value to macro string as a new argument
+// return: Macro
+func (macro *Macro) Val() *Macro {
+	dw0 := macro.Register(PAD_CFG_DW0)
+	return macro.Separator().Add(strconv.Itoa(int(dw0.GetGPIOTXState())))
+}
+
+// Adds Pad GPO value to macro string as a new argument
+// return: Macro
+func (macro *Macro) Trig() *Macro {
+	dw0 := macro.Register(PAD_CFG_DW0)
+	var trig = map[uint8]string{
+		0x0: "LEVEL",
+		0x1: "EDGE_SINGLE",
+		0x2: "OFF",
+		0x3: "EDGE_BOTH",
+	}
+	return macro.Separator().Add(trig[dw0.GetRXLevelEdgeConfiguration()])
+}
+
+// Adds Pad Polarity Inversion Stage (RXINV) to macro string as a new argument
+// return: Macro
+func (macro *Macro) Invert() *Macro {
+	macro.Separator()
+	if macro.Register(PAD_CFG_DW0).GetRxInvert() !=0 {
+		return macro.Add("INVERT")
+	}
+	return macro.Add("NONE")
+}
+
+// Adds input/output buffer state
+// return: Macro
+func (macro *Macro) Bufdis() *Macro {
+	var buffDisStat = map[uint8]string{
+		0x0: "NO_DISABLE",    // both buffers are enabled
+		0x1: "TX_DISABLE",    // output buffer is disabled
+		0x2: "RX_DISABLE",    // input buffer is disabled
+		0x3: "TX_RX_DISABLE", // both buffers are disabled
+	}
+	state := macro.Register(PAD_CFG_DW0).GetGPIORxTxDisableStatus()
+	return macro.Separator().Add(buffDisStat[state])
+}
+
+// Adds macro to set the host software ownership
+// return: Macro
+func (macro *Macro) Own() *Macro {
+	if macro.IsOwnershipDriver() {
+		return macro.Separator().Add("DRIVER")
+	}
+	return macro.Separator().Add("ACPI")
+}
+
+//Adds pad native function (PMODE) as a new argument
+//return: Macro
+func (macro *Macro) Padfn() *Macro {
+	dw0 := macro.Register(PAD_CFG_DW0)
+	nfnum := int(dw0.GetPadMode())
+	if nfnum != 0 {
+		return macro.Separator().Add("NF" + strconv.Itoa(nfnum))
+	}
+	// GPIO used only for PAD_FUNC(x) macro
+	return macro.Add("GPIO")
+}
+
+// Add a line to the macro that defines IO Standby State
+// return: macro
+func (macro *Macro) IOSstate() *Macro {
+	var stateMacro = map[uint8]string{
+		TxLASTRxE:     "TxLASTRxE",
+		Tx0RxDCRx0:    "Tx0RxDCRx0",
+		Tx0RxDCRx1:    "Tx0RxDCRx1",
+		Tx1RxDCRx0:    "Tx1RxDCRx0",
+		Tx1RxDCRx1:    "Tx1RxDCRx1",
+		Tx0RxE:        "Tx0RxE",
+		Tx1RxE:        "Tx1RxE",
+		HIZCRx0:       "HIZCRx0",
+		HIZCRx1:       "HIZCRx1",
+		TxDRxE:        "TxDRxE",
+		StandbyIgnore: "IGNORE",
+	}
+	dw1 := macro.Register(PAD_CFG_DW1)
+	str, valid := stateMacro[dw1.GetIOStandbyState()]
+	if !valid {
+		// ignore setting for incorrect value
+		str = "IGNORE"
+	}
+	return macro.Separator().Add(str)
+}
+
+// Add a line to the macro that defines IO Standby Termination
+// return: macro
+func (macro *Macro) IOTerm() *Macro {
+	var ioTermMacro = map[uint8]string{
+		IOSTERM_SAME:    "SAME",
+		IOSTERM_DISPUPD: "DISPUPD",
+		IOSTERM_ENPD:    "ENPD",
+		IOSTERM_ENPU:    "ENPU",
+	}
+	dw1 := macro.Register(PAD_CFG_DW1)
+	return macro.Separator().Add(ioTermMacro[dw1.GetIOStandbyTermination()])
+}
+
+// Check created macro
+func (macro *Macro) check() *Macro {
+	if !macro.Register(PAD_CFG_DW0).MaskCheck() {
+		return macro.GenerateFields()
+	}
+	return macro
+}
+
+// or - Set " | " if its needed
+func (macro *Macro) Or() *Macro {
+
+		if str := macro.Get(); str[len(str) - 1] == ')' {
+			macro.Add(" | ")
+		}
+		return macro
+}
+
+// AddToMacroIgnoredMask - Print info about ignored field mask
+// title - warning message
+func (macro *Macro) AddToMacroIgnoredMask() *Macro {
+	if config.InfoLevelGet() < 4 || config.IsFspStyleMacro() {
+		return macro
+	}
+	dw0 := macro.Register(PAD_CFG_DW0)
+	dw1 := macro.Register(PAD_CFG_DW1)
+	// Get mask of ignored bit fields.
+	dw0Ignored := dw0.IgnoredFieldsGet()
+	dw1Ignored := dw1.IgnoredFieldsGet()
+	if dw0Ignored != 0 {
+		dw0temp := dw0.ValueGet()
+		dw0.ValueSet(dw0Ignored)
+		macro.Add("\n\t/* DW0 : ")
+		macro.Fields.DecodeDW0()
+		macro.Add(" - IGNORED */")
+		dw0.ValueSet(dw0temp)
+	}
+	if dw1Ignored != 0 {
+		dw1temp	:= dw1.ValueGet()
+		dw1.ValueSet(dw1Ignored)
+		macro.Add("\n\t/* DW1 : ")
+		macro.Fields.DecodeDW1()
+		macro.Add(" - IGNORED */")
+		dw1.ValueSet(dw1temp)
+	}
+	return macro
+}
+
+// GenerateFields - generate bitfield macros
+func (macro *Macro) GenerateFields() *Macro {
+	dw0 := macro.Register(PAD_CFG_DW0)
+	dw1 := macro.Register(PAD_CFG_DW1)
+
+	// Get mask of ignored bit fields.
+	dw0Ignored := dw0.IgnoredFieldsGet()
+	dw1Ignored := dw1.IgnoredFieldsGet()
+
+	if config.InfoLevelGet() <= 1 {
+		macro.Clear()
+	} else if config.InfoLevelGet() >= 3 {
+		// Add string of reference macro as a comment
+		reference := macro.Get()
+		macro.Clear()
+		macro.Add("/* ").Add(reference).Add(" */")
+		macro.AddToMacroIgnoredMask()
+		macro.Add("\n\t")
+	}
+	if config.AreFieldsIgnored() {
+		// Consider bit fields that should be ignored when regenerating
+		// advansed macros
+		var tempVal uint32 = dw0.ValueGet() & ^dw0Ignored
+		dw0.ValueSet(tempVal)
+
+		tempVal = dw1.ValueGet() & ^dw1Ignored
+		dw1.ValueSet(tempVal)
+	}
+
+	macro.Fields.GenerateString()
+	return macro
+}
+
+// Generate macro for bi-directional GPIO port
+func (macro *Macro) Bidirection() {
+	dw1 := macro.Register(PAD_CFG_DW1)
+	ios := dw1.GetIOStandbyState() != 0 || dw1.GetIOStandbyTermination() != 0
+	macro.Set("PAD_CFG_GPIO_BIDIRECT")
+	if ios {
+		macro.Add("_IOS")
+	}
+	// PAD_CFG_GPIO_BIDIRECT(pad, val, pull, rst, trig, own)
+	macro.Add("(").Id().Val().Pull().Rstsrc().Trig()
+	if ios {
+		// PAD_CFG_GPIO_BIDIRECT_IOS(pad, val, pull, rst, trig, iosstate, iosterm, own)
+		macro.IOSstate().IOTerm()
+	}
+	macro.Own().Add("),")
+}
+
+const (
+	rxDisable uint8 = 0x2
+	txDisable uint8 = 0x1
+)
+
+// Gets base string of current macro
+// return: string of macro
+func (macro *Macro) Generate() string {
+	dw0 := macro.Register(PAD_CFG_DW0)
+
+	macro.Platform.RemmapRstSrc()
+	macro.Set("PAD_CFG")
+	if dw0.GetPadMode() == 0 {
+		// GPIO
+		switch dw0.GetGPIORxTxDisableStatus() {
+		case txDisable:
+			macro.Platform.GpiMacroAdd() // GPI
+
+		case rxDisable:
+			macro.Platform.GpoMacroAdd() // GPO
+
+		case rxDisable | txDisable:
+			macro.Platform.NoConnMacroAdd() // NC
+
+		default:
+			macro.Bidirection()
+		}
+	} else {
+		macro.Platform.NativeFunctionMacroAdd()
+	}
+
+	if config.IsFieldsMacroUsed() {
+		// Clear control mask to generate advanced macro only
+		return macro.GenerateFields().Get()
+	}
+
+	if config.IsNonCheckingFlagUsed() {
+		macro.AddToMacroIgnoredMask()
+		return macro.Get()
+	}
+
+	return macro.check().Get()
+}
diff --git a/util/intelp2m/platforms/common/register.go b/util/intelp2m/platforms/common/register.go
new file mode 100644
index 0000000000..2aa51b92e9
--- /dev/null
+++ b/util/intelp2m/platforms/common/register.go
@@ -0,0 +1,262 @@
+package common
+
+// Bit field constants for PAD_CFG_DW0 register
+const (
+	AllFields uint32 = 0xffffffff
+
+	PadRstCfgShift uint8  = 30
+	PadRstCfgMask  uint32 = 0x3 << PadRstCfgShift
+
+	RxPadStateSelectShift uint8  = 29
+	RxPadStateSelectMask  uint32 = 0x1 << RxPadStateSelectShift
+
+	RxRawOverrideTo1Shift uint8  = 28
+	RxRawOverrideTo1Mask  uint32 = 0x1 << RxRawOverrideTo1Shift
+
+	RxLevelEdgeConfigurationShift uint8  = 25
+	RxLevelEdgeConfigurationMask  uint32 = 0x3 << RxLevelEdgeConfigurationShift
+
+	RxInvertShift uint8  = 23
+	RxInvertMask  uint32 = 0x1 << RxInvertShift
+
+	RxTxEnableConfigShift uint8  = 21
+	RxTxEnableConfigMask  uint32 = 0x3 << RxTxEnableConfigShift
+
+	InputRouteIOxApicShift uint8  = 20
+	InputRouteIOxApicMask  uint32 = 0x1 << InputRouteIOxApicShift
+
+	InputRouteSCIShift uint8  = 19
+	InputRouteSCIMask  uint32 = 0x1 << InputRouteSCIShift
+
+	InputRouteSMIShift uint8  = 18
+	InputRouteSMIMask  uint32 = 0x1 << InputRouteSMIShift
+
+	InputRouteNMIShift uint8  = 17
+	InputRouteNMIMask  uint32 = 0x1 << InputRouteNMIShift
+
+	PadModeShift uint8  = 10
+	PadModeMask  uint32 = 0x7 << PadModeShift
+
+	RxTxBufDisableShift uint8  = 8
+	RxTxBufDisableMask  uint32 = 0x3 << RxTxBufDisableShift
+
+	RxStateShift uint8  = 1
+	RxStateMask  uint32 = 0x1 << RxStateShift
+
+	TxStateMask uint32 = 0x1
+)
+
+// config DW registers
+const (
+	PAD_CFG_DW0 = 0
+	PAD_CFG_DW1 = 1
+	MAX_DW_NUM  = 2
+)
+
+// Register - configuration data structure based on DW0/1 dw value
+// value    : register value
+// mask     : bit fileds mask
+// roFileds : read only fields mask
+type Register struct {
+	value    uint32
+	mask     uint32
+	roFileds uint32
+}
+
+func (reg *Register) ValueSet(value uint32) *Register {
+	reg.value = value
+	return reg
+}
+
+func (reg *Register) ValueGet() uint32 {
+	return reg.value
+}
+
+func (reg *Register) ReadOnlyFieldsSet(fileldMask uint32) *Register {
+	reg.roFileds = fileldMask
+	return reg
+}
+
+func (reg *Register) ReadOnlyFieldsGet() uint32 {
+	return reg.roFileds
+}
+
+// Check the mask of the new macro
+// Returns true if the macro is generated correctly
+func (reg *Register) MaskCheck() bool {
+	mask := ^(reg.mask | reg.roFileds)
+	return reg.value&mask == 0
+}
+
+// getResetConfig - get Reset Configuration from PADRSTCFG field in PAD_CFG_DW0_GPx register
+func (reg *Register) getFieldVal(mask uint32, shift uint8) uint8 {
+	reg.mask |= mask
+	return uint8((reg.value & mask) >> shift)
+}
+
+// CntrMaskFieldsClear - clear filed in control mask
+// fieldMask - mask of the field to be cleared
+func (reg *Register) CntrMaskFieldsClear(fieldMask uint32) {
+	reg.mask &= ^fieldMask;
+}
+
+// IgnoredFieldsGet - return mask of unchecked (ignored) fields.
+//                    These bit fields were not read when the macro was
+//                    generated.
+// return
+//   mask of ignored bit field
+func (reg *Register) IgnoredFieldsGet() uint32 {
+	mask := reg.mask | reg.roFileds
+	return reg.value & ^mask
+}
+
+// getResetConfig - returns type reset source for corresponding pad
+// PADRSTCFG field in PAD_CFG_DW0 register
+func (reg *Register) GetResetConfig() uint8 {
+	return reg.getFieldVal(PadRstCfgMask, PadRstCfgShift)
+}
+
+// getRXPadStateSelect - returns RX Pad State (RXINV)
+// 0 = Raw RX pad state directly from RX buffer
+// 1 = Internal RX pad state
+func (reg *Register) GetRXPadStateSelect() uint8 {
+	return reg.getFieldVal(RxPadStateSelectMask, RxPadStateSelectShift)
+}
+
+// getRXRawOverrideStatus - returns 1 if the selected pad state is being
+// overridden to '1' (RXRAW1 field)
+func (reg *Register) GetRXRawOverrideStatus() uint8 {
+	return reg.getFieldVal(RxRawOverrideTo1Mask, RxRawOverrideTo1Shift)
+}
+
+// getRXLevelEdgeConfiguration - returns RX Level/Edge Configuration (RXEVCFG)
+// 0h = Level, 1h = Edge, 2h = Drive '0', 3h = Reserved (implement as setting 0h)
+func (reg *Register) GetRXLevelEdgeConfiguration() uint8 {
+	return reg.getFieldVal(RxLevelEdgeConfigurationMask, RxLevelEdgeConfigurationShift)
+}
+
+// GetRxInvert - returns RX Invert state (RXINV)
+// 1 - Inversion, 0 - No inversion
+func (reg *Register) GetRxInvert() uint8 {
+	return reg.getFieldVal(RxInvertMask, RxInvertShift)
+}
+
+// getRxTxEnableConfig - returns RX/TX Enable Config (RXTXENCFG)
+// 0 = Function defined in Pad Mode controls TX and RX Enables
+// 1 = Function controls TX Enable and RX Disabled with RX drive 0 internally
+// 2 = Function controls TX Enable and RX Disabled with RX drive 1 internally
+// 3 = Function controls TX Enabled and RX is always enabled
+func (reg *Register) GetRxTxEnableConfig() uint8 {
+	return reg.getFieldVal(RxTxEnableConfigMask, RxTxEnableConfigShift)
+}
+
+// getGPIOInputRouteIOxAPIC - returns 1 if the pad can be routed to cause
+// peripheral IRQ when configured in GPIO input mode.
+func (reg *Register) GetGPIOInputRouteIOxAPIC() uint8 {
+	return reg.getFieldVal(InputRouteIOxApicMask, InputRouteIOxApicShift)
+}
+
+// getGPIOInputRouteSCI - returns 1 if the pad can be routed to cause SCI when
+// configured in GPIO input mode.
+func (reg *Register) GetGPIOInputRouteSCI() uint8 {
+	return reg.getFieldVal(InputRouteSCIMask, InputRouteSCIShift)
+}
+
+// getGPIOInputRouteSMI - returns 1 if the pad can be routed to cause SMI when
+// configured in GPIO input mode
+func (reg *Register) GetGPIOInputRouteSMI() uint8 {
+	return reg.getFieldVal(InputRouteSMIMask, InputRouteSMIShift)
+}
+
+// getGPIOInputRouteNMI - returns 1 if the pad can be routed to cause NMI when
+// configured in GPIO input mode
+func (reg *Register) GetGPIOInputRouteNMI() uint8 {
+	return reg.getFieldVal(InputRouteNMIMask, InputRouteNMIShift)
+}
+
+// getPadMode - reutrns pad mode or one of the native functions
+// 0h = GPIO control the Pad.
+// 1h = native function 1, if applicable, controls the Pad
+// 2h = native function 2, if applicable, controls the Pad
+// 3h = native function 3, if applicable, controls the Pad
+// 4h = enable GPIO blink/PWM capability if applicable
+func (reg *Register) GetPadMode() uint8 {
+	return reg.getFieldVal(PadModeMask, PadModeShift)
+}
+
+// getGPIORxTxDisableStatus - returns GPIO RX/TX buffer state (GPIORXDIS | GPIOTXDIS)
+// 0 - both are enabled, 1 - TX Disable, 2 - RX Disable, 3 - both are disabled
+func (reg *Register) GetGPIORxTxDisableStatus() uint8 {
+	return reg.getFieldVal(RxTxBufDisableMask, RxTxBufDisableShift)
+}
+
+// getGPIORXState - returns GPIO RX State (GPIORXSTATE)
+func (reg *Register) GetGPIORXState() uint8 {
+	return reg.getFieldVal(RxStateMask, RxStateShift)
+}
+
+// getGPIOTXState - returns GPIO TX State (GPIOTXSTATE)
+func (reg *Register) GetGPIOTXState() uint8 {
+	return reg.getFieldVal(TxStateMask, 0)
+}
+
+// Bit field constants for PAD_CFG_DW1 register
+const (
+	PadTolShift uint8  = 25
+	PadTolMask  uint32 = 0x1 << PadTolShift
+
+	IOStandbyStateShift uint8  = 14
+	IOStandbyStateMask  uint32 = 0xF << IOStandbyStateShift
+
+	TermShift uint8  = 10
+	TermMask  uint32 = 0xF << TermShift
+
+	IOStandbyTerminationShift uint8  = 8
+	IOStandbyTerminationMask  uint32 = 0x3 << IOStandbyTerminationShift
+
+	InterruptSelectMask uint32 = 0xFF
+)
+
+// GetPadTol
+func (reg *Register) GetPadTol() uint8 {
+	return reg.getFieldVal(PadTolMask, PadTolShift)
+}
+
+// getIOStandbyState - return IO Standby State (IOSSTATE)
+// 0 = Tx enabled driving last value driven, Rx enabled
+// 1 = Tx enabled driving 0, Rx disabled and Rx driving 0 back to its controller internally
+// 2 = Tx enabled driving 0, Rx disabled and Rx driving 1 back to its controller internally
+// 3 = Tx enabled driving 1, Rx disabled and Rx driving 0 back to its controller internally
+// 4 = Tx enabled driving 1, Rx disabled and Rx driving 1 back to its controller internally
+// 5 = Tx enabled driving 0, Rx enabled
+// 6 = Tx enabled driving 1, Rx enabled
+// 7 = Hi-Z, Rx driving 0 back to its controller internally
+// 8 = Hi-Z, Rx driving 1 back to its controller internally
+// 9 = Tx disabled, Rx enabled
+// 15 = IO-Standby is ignored for this pin (same as functional mode)
+// Others reserved
+func (reg *Register) GetIOStandbyState() uint8 {
+	return reg.getFieldVal(IOStandbyStateMask, IOStandbyStateShift)
+}
+
+// getIOStandbyTermination - return IO Standby Termination (IOSTERM)
+// 0 = Same as functional mode (no change)
+// 1 = Disable Pull-up and Pull-down (no on-die termination)
+// 2 = Enable Pull-down
+// 3 = Enable Pull-up
+func (reg *Register) GetIOStandbyTermination() uint8 {
+	return reg.getFieldVal(IOStandbyTerminationMask, IOStandbyTerminationShift)
+}
+
+// getTermination - returns the pad termination state defines the different weak
+// pull-up and pull-down settings that are supported by the buffer
+// 0000 = none; 0010 = 5k PD; 0100 = 20k PD; 1010 = 5k PU; 1100 = 20k PU;
+// 1111 = Native controller selected
+func (reg *Register) GetTermination() uint8 {
+	return reg.getFieldVal(TermMask, TermShift)
+}
+
+// getInterruptSelect - returns Interrupt Line number from the GPIO controller
+func (reg *Register) GetInterruptSelect() uint8 {
+	return reg.getFieldVal(InterruptSelectMask, 0)
+}
diff --git a/util/intelp2m/platforms/lbg/macro.go b/util/intelp2m/platforms/lbg/macro.go
new file mode 100644
index 0000000000..6b44a25885
--- /dev/null
+++ b/util/intelp2m/platforms/lbg/macro.go
@@ -0,0 +1,102 @@
+package lbg
+
+import "fmt"
+
+// Local packages
+import "../../config"
+import "../../fields"
+import "../common"
+import "../snr"
+
+const (
+	PAD_CFG_DW0_RO_FIELDS = (0x1 << 27) | (0x1 << 24) | (0x3 << 21) | (0xf << 16) | 0xfc
+	PAD_CFG_DW1_RO_FIELDS = 0xfdffc3ff
+)
+
+const (
+	PAD_CFG_DW0 = common.PAD_CFG_DW0
+	PAD_CFG_DW1 = common.PAD_CFG_DW1
+	MAX_DW_NUM  = common.MAX_DW_NUM
+)
+
+type InheritanceMacro interface {
+	Pull()
+	GpiMacroAdd()
+	GpoMacroAdd()
+	NativeFunctionMacroAdd()
+	NoConnMacroAdd()
+}
+
+type PlatformSpecific struct {
+	InheritanceMacro
+	InheritanceTemplate
+}
+
+// RemmapRstSrc - remmap Pad Reset Source Config
+func (PlatformSpecific) RemmapRstSrc() {
+	macro := common.GetMacro()
+	if config.TemplateGet() != config.TempInteltool {
+		// Use reset source remapping only if the input file is inteltool.log dump
+		return
+	}
+	dw0 := macro.Register(PAD_CFG_DW0)
+	var remapping = map[uint8]uint32{
+		0: common.RST_RSMRST << common.PadRstCfgShift,
+		1: common.RST_DEEP   << common.PadRstCfgShift,
+		2: common.RST_PLTRST << common.PadRstCfgShift,
+	}
+	resetsrc, valid := remapping[dw0.GetResetConfig()]
+	if valid {
+		// dw0.SetResetConfig(resetsrc)
+		ResetConfigFieldVal := (dw0.ValueGet() & 0x3fffffff) | remapping[dw0.GetResetConfig()]
+		dw0.ValueSet(ResetConfigFieldVal)
+	} else {
+		fmt.Println("Invalid Pad Reset Config [ 0x", resetsrc ," ] for ", macro.PadIdGet())
+	}
+	dw0.CntrMaskFieldsClear(common.PadRstCfgMask)
+}
+
+// Adds The Pad Termination (TERM) parameter from PAD_CFG_DW1 to the macro
+// as a new argument
+func (platform PlatformSpecific) Pull() {
+	platform.InheritanceMacro.Pull()
+}
+
+// Adds PAD_CFG_GPI macro with arguments
+func (platform PlatformSpecific) GpiMacroAdd() {
+	platform.InheritanceMacro.GpiMacroAdd()
+}
+
+// Adds PAD_CFG_GPO macro with arguments
+func (platform PlatformSpecific) GpoMacroAdd() {
+	platform.InheritanceMacro.GpoMacroAdd()
+}
+
+// Adds PAD_CFG_NF macro with arguments
+func (platform PlatformSpecific) NativeFunctionMacroAdd() {
+	platform.InheritanceMacro.NativeFunctionMacroAdd()
+}
+
+// Adds PAD_NC macro
+func (platform PlatformSpecific) NoConnMacroAdd() {
+	platform.InheritanceMacro.NoConnMacroAdd()
+}
+
+// GenMacro - generate pad macro
+// dw0 : DW0 config register value
+// dw1 : DW1 config register value
+// return: string of macro
+//         error
+func (platform PlatformSpecific) GenMacro(id string, dw0 uint32, dw1 uint32, ownership uint8) string {
+	// The GPIO controller architecture in Lewisburg and Sunrise are very similar,
+	// so we will inherit some platform-dependent functions from Sunrise.
+	macro := common.GetInstanceMacro(PlatformSpecific{InheritanceMacro : snr.PlatformSpecific{}},
+			fields.InterfaceGet())
+	macro.Clear()
+	macro.Register(PAD_CFG_DW0).CntrMaskFieldsClear(common.AllFields)
+	macro.Register(PAD_CFG_DW0).CntrMaskFieldsClear(common.AllFields)
+	macro.PadIdSet(id).SetPadOwnership(ownership)
+	macro.Register(PAD_CFG_DW0).ValueSet(dw0).ReadOnlyFieldsSet(PAD_CFG_DW0_RO_FIELDS)
+	macro.Register(PAD_CFG_DW1).ValueSet(dw1).ReadOnlyFieldsSet(PAD_CFG_DW1_RO_FIELDS)
+	return macro.Generate()
+}
diff --git a/util/intelp2m/platforms/lbg/template.go b/util/intelp2m/platforms/lbg/template.go
new file mode 100644
index 0000000000..74c39efadf
--- /dev/null
+++ b/util/intelp2m/platforms/lbg/template.go
@@ -0,0 +1,22 @@
+package lbg
+
+type InheritanceTemplate interface {
+	GroupNameExtract(line string) (bool, string)
+	KeywordCheck(line string) bool
+}
+
+// GroupNameExtract - This function extracts the group ID, if it exists in a row
+// line      : string from the configuration file
+// return
+//     bool   : true if the string contains a group identifier
+//     string : group identifier
+func (platform PlatformSpecific) GroupNameExtract(line string) (bool, string) {
+	return platform.InheritanceTemplate.GroupNameExtract(line)
+}
+
+// KeywordCheck - This function is used to filter parsed lines of the configuration file and
+//                returns true if the keyword is contained in the line.
+// line      : string from the configuration file
+func (platform PlatformSpecific) KeywordCheck(line string) bool {
+	return platform.InheritanceTemplate.KeywordCheck(line)
+}
diff --git a/util/intelp2m/platforms/snr/macro.go b/util/intelp2m/platforms/snr/macro.go
new file mode 100644
index 0000000000..86cc7b727f
--- /dev/null
+++ b/util/intelp2m/platforms/snr/macro.go
@@ -0,0 +1,278 @@
+package snr
+
+import "strings"
+import "fmt"
+
+// Local packages
+import "../common"
+import "../../config"
+import "../../fields"
+
+const (
+	PAD_CFG_DW0_RO_FIELDS = (0x1 << 27) | (0x1 << 24) | (0x3 << 21) | (0xf << 16) | 0xfc
+	PAD_CFG_DW1_RO_FIELDS = 0xfdffc3ff
+)
+
+const (
+	PAD_CFG_DW0 = common.PAD_CFG_DW0
+	PAD_CFG_DW1 = common.PAD_CFG_DW1
+	MAX_DW_NUM  = common.MAX_DW_NUM
+)
+
+type PlatformSpecific struct {}
+
+// RemmapRstSrc - remmap Pad Reset Source Config
+func (PlatformSpecific) RemmapRstSrc() {
+	macro := common.GetMacro()
+	if config.TemplateGet() != config.TempInteltool {
+		// Use reset source remapping only if the input file is inteltool.log dump
+		return
+	}
+	if strings.Contains(macro.PadIdGet(), "GPD") {
+		// See reset map for the Sunrise GPD Group in the Community 2:
+		// https://github.com/coreboot/coreboot/blob/master/src/soc/intel/skylake/gpio.c#L15
+		// remmap is not required because it is the same as common.
+		return
+	}
+
+	dw0 := macro.Register(PAD_CFG_DW0)
+	var remapping = map[uint8]uint32{
+		0: common.RST_RSMRST << common.PadRstCfgShift,
+		1: common.RST_DEEP   << common.PadRstCfgShift,
+		2: common.RST_PLTRST << common.PadRstCfgShift,
+	}
+	resetsrc, valid := remapping[dw0.GetResetConfig()]
+	if valid {
+		// dw0.SetResetConfig(resetsrc)
+		ResetConfigFieldVal := (dw0.ValueGet() & 0x3fffffff) | remapping[dw0.GetResetConfig()]
+		dw0.ValueSet(ResetConfigFieldVal)
+	} else {
+		fmt.Println("Invalid Pad Reset Config [ 0x", resetsrc ," ] for ", macro.PadIdGet())
+	}
+	dw0.CntrMaskFieldsClear(common.PadRstCfgMask)
+}
+
+// Adds The Pad Termination (TERM) parameter from PAD_CFG_DW1 to the macro
+// as a new argument
+func (PlatformSpecific) Pull() {
+	macro := common.GetMacro()
+	dw1 := macro.Register(PAD_CFG_DW1)
+	var pull = map[uint8]string{
+		0x0: "NONE",
+		0x2: "5K_PD",
+		0x4: "20K_PD",
+		0x9: "1K_PU",
+		0xa: "5K_PU",
+		0xb: "2K_PU",
+		0xc: "20K_PU",
+		0xd: "667_PU",
+		0xf: "NATIVE",
+	}
+	str, valid := pull[dw1.GetTermination()]
+	if !valid {
+		str = "INVALID"
+		fmt.Println("Error",
+				macro.PadIdGet(),
+				" invalid TERM value = ",
+				int(dw1.GetTermination()))
+	}
+	macro.Separator().Add(str)
+}
+
+// Generate macro to cause peripheral IRQ when configured in GPIO input mode
+func ioApicRoute() bool {
+	macro := common.GetMacro()
+	dw0 := macro.Register(PAD_CFG_DW0)
+	if dw0.GetGPIOInputRouteIOxAPIC() == 0 {
+		return false
+	}
+
+	macro.Add("_APIC")
+	if dw0.GetRXLevelEdgeConfiguration() == common.TRIG_LEVEL {
+		if dw0.GetRxInvert() != 0 {
+			// PAD_CFG_GPI_APIC_INVERT(pad, pull, rst)
+			macro.Add("_INVERT")
+		}
+		// PAD_CFG_GPI_APIC(pad, pull, rst)
+		macro.Add("(").Id().Pull().Rstsrc().Add("),")
+		return true
+	}
+
+	// e.g. PAD_CFG_GPI_APIC_IOS(pad, pull, rst, trig, inv, iosstate, iosterm)
+	macro.Add("_IOS(").Id().Pull().Rstsrc().Trig().Invert().Add(", TxLASTRxE, SAME),")
+	return true
+}
+
+// Generate macro to cause NMI when configured in GPIO input mode
+func nmiRoute() bool {
+	macro := common.GetMacro()
+	if macro.Register(PAD_CFG_DW0).GetGPIOInputRouteNMI() == 0 {
+		return false
+	}
+	// PAD_CFG_GPI_NMI(GPIO_24, UP_20K, DEEP, LEVEL, INVERT),
+	macro.Add("_NMI").Add("(").Id().Pull().Rstsrc().Trig().Invert().Add("),")
+	return true
+}
+
+// Generate macro to cause SCI when configured in GPIO input mode
+func sciRoute() bool {
+	macro := common.GetMacro()
+	dw0 := macro.Register(PAD_CFG_DW0)
+	if dw0.GetGPIOInputRouteSCI() == 0 {
+		return false
+	}
+	// e.g. PAD_CFG_GPI_SCI(GPP_B18, UP_20K, PLTRST, LEVEL, INVERT),
+	if (dw0.GetRXLevelEdgeConfiguration() & common.TRIG_EDGE_SINGLE) != 0 {
+		// e.g. PAD_CFG_GPI_ACPI_SCI(GPP_G2, NONE, DEEP, YES),
+		// #define PAD_CFG_GPI_ACPI_SCI(pad, pull, rst, inv)	\
+		//             PAD_CFG_GPI_SCI(pad, pull, rst, EDGE_SINGLE, inv)
+		macro.Add("_ACPI")
+	}
+	macro.Add("_SCI").Add("(").Id().Pull().Rstsrc()
+	if (dw0.GetRXLevelEdgeConfiguration() & common.TRIG_EDGE_SINGLE) == 0 {
+		macro.Trig()
+	}
+	macro.Invert().Add("),")
+	return true
+}
+
+// Generate macro to cause SMI when configured in GPIO input mode
+func smiRoute() bool {
+	macro := common.GetMacro()
+	dw0 := macro.Register(PAD_CFG_DW0)
+	if dw0.GetGPIOInputRouteSMI() == 0 {
+		return false
+	}
+	if (dw0.GetRXLevelEdgeConfiguration() & common.TRIG_EDGE_SINGLE) != 0 {
+		// e.g. PAD_CFG_GPI_ACPI_SMI(GPP_I3, NONE, DEEP, YES),
+		macro.Add("_ACPI")
+	}
+	macro.Add("_SMI").Add("(").Id().Pull().Rstsrc()
+	if (dw0.GetRXLevelEdgeConfiguration() & common.TRIG_EDGE_SINGLE) == 0 {
+		// e.g. PAD_CFG_GPI_SMI(GPP_E7, NONE, DEEP, LEVEL, NONE),
+		macro.Trig()
+	}
+	macro.Invert().Add("),")
+	return true
+}
+
+// Adds PAD_CFG_GPI macro with arguments
+func (PlatformSpecific) GpiMacroAdd() {
+	macro := common.GetMacro()
+	var ids []string
+	macro.Set("PAD_CFG_GPI")
+	for routeid, isRoute := range map[string]func() (bool) {
+		"IOAPIC": ioApicRoute,
+		"SCI":    sciRoute,
+		"SMI":    smiRoute,
+		"NMI":    nmiRoute,
+	} {
+		if isRoute() {
+			ids = append(ids, routeid)
+		}
+	}
+
+	switch argc := len(ids); argc {
+	case 0:
+		// e.g. PAD_CFG_GPI_TRIG_OWN(pad, pull, rst, trig, own)
+		macro.Add("_TRIG_OWN").Add("(").Id().Pull().Rstsrc().Trig().Own().Add("),")
+	case 1:
+		// GPI with IRQ route
+		if config.AreFieldsIgnored() {
+			// Set Host Software Ownership to ACPI mode
+			macro.SetPadOwnership(common.PAD_OWN_ACPI)
+		}
+
+	case 2:
+		// PAD_CFG_GPI_DUAL_ROUTE(pad, pull, rst, trig, inv, route1, route2)
+		macro.Set("PAD_CFG_GPI_DUAL_ROUTE(").Id().Pull().Rstsrc().Trig().Invert()
+		macro.Add(", " + ids[0] + ", " + ids[1] + "),")
+		if config.AreFieldsIgnored() {
+			// Set Host Software Ownership to ACPI mode
+			macro.SetPadOwnership(common.PAD_OWN_ACPI)
+		}
+	default:
+		// Clear the control mask so that the check fails and "Advanced" macro is
+		// generated
+		macro.Register(PAD_CFG_DW0).CntrMaskFieldsClear(common.AllFields)
+	}
+}
+
+// Adds PAD_CFG_GPO macro with arguments
+func (PlatformSpecific) GpoMacroAdd() {
+	macro := common.GetMacro()
+	dw0 := macro.Register(PAD_CFG_DW0)
+	term := macro.Register(PAD_CFG_DW1).GetTermination()
+
+	// #define PAD_CFG_GPO(pad, val, rst)                \
+	//    _PAD_CFG_STRUCT(pad,                           \
+	//      PAD_FUNC(GPIO) | PAD_RESET(rst) |            \
+	//      PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | !!val, \
+	//      PAD_PULL(NONE) | PAD_IOSSTATE(TxLASTRxE))
+	if dw0.GetRXLevelEdgeConfiguration() != common.TRIG_OFF {
+		dw0.CntrMaskFieldsClear(common.RxLevelEdgeConfigurationMask)
+	}
+	macro.Set("PAD_CFG")
+	if macro.IsOwnershipDriver() {
+		// PAD_CFG_GPO_GPIO_DRIVER(pad, val, rst, pull)
+		macro.Add("_GPO_GPIO_DRIVER").Add("(").Id().Val().Rstsrc().Pull().Add("),")
+		return
+	}
+	if term != 0 {
+		// e.g. PAD_CFG_TERM_GPO(GPP_B23, 1, DN_20K, DEEP),
+		macro.Add("_TERM")
+	}
+	macro.Add("_GPO").Add("(").Id().Val()
+	if term != 0 {
+		macro.Pull()
+	}
+	macro.Rstsrc().Add("),")
+}
+
+// Adds PAD_CFG_NF macro with arguments
+func (PlatformSpecific) NativeFunctionMacroAdd() {
+	macro := common.GetMacro()
+	// e.g. PAD_CFG_NF(GPP_D23, NONE, DEEP, NF1)
+	macro.Set("PAD_CFG_NF")
+	if macro.Register(PAD_CFG_DW1).GetPadTol() != 0 {
+		macro.Add("_1V8")
+	}
+	macro.Add("(").Id().Pull().Rstsrc().Padfn().Add("),")
+}
+
+// Adds PAD_NC macro
+func (PlatformSpecific) NoConnMacroAdd() {
+	macro := common.GetMacro()
+	// #define PAD_NC(pad, pull)
+	// _PAD_CFG_STRUCT(pad,
+	//     PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE),
+	//     PAD_PULL(pull) | PAD_IOSSTATE(TxDRxE)),
+	dw0 := macro.Register(PAD_CFG_DW0)
+
+	// Some fields of the configuration registers are hidden inside the macros,
+	// we should check them to update the corresponding bits in the control mask.
+	if dw0.GetRXLevelEdgeConfiguration() != common.TRIG_OFF {
+		dw0.CntrMaskFieldsClear(common.RxLevelEdgeConfigurationMask)
+	}
+	if dw0.GetResetConfig() != 1 { // 1 = RST_DEEP
+		dw0.CntrMaskFieldsClear(common.PadRstCfgMask)
+	}
+
+	macro.Set("PAD_NC").Add("(").Id().Pull().Add("),")
+}
+
+// GenMacro - generate pad macro
+// dw0 : DW0 config register value
+// dw1 : DW1 config register value
+// return: string of macro
+//         error
+func (PlatformSpecific) GenMacro(id string, dw0 uint32, dw1 uint32, ownership uint8) string {
+	macro := common.GetInstanceMacro(PlatformSpecific{}, fields.InterfaceGet())
+	macro.Clear()
+	macro.Register(PAD_CFG_DW0).CntrMaskFieldsClear(common.AllFields)
+	macro.Register(PAD_CFG_DW0).CntrMaskFieldsClear(common.AllFields)
+	macro.PadIdSet(id).SetPadOwnership(ownership)
+	macro.Register(PAD_CFG_DW0).ValueSet(dw0).ReadOnlyFieldsSet(PAD_CFG_DW0_RO_FIELDS)
+	macro.Register(PAD_CFG_DW1).ValueSet(dw1).ReadOnlyFieldsSet(PAD_CFG_DW1_RO_FIELDS)
+	return macro.Generate()
+}
diff --git a/util/intelp2m/platforms/snr/template.go b/util/intelp2m/platforms/snr/template.go
new file mode 100644
index 0000000000..c6c39b198e
--- /dev/null
+++ b/util/intelp2m/platforms/snr/template.go
@@ -0,0 +1,37 @@
+package snr
+
+import "strings"
+
+// GroupNameExtract - This function extracts the group ID, if it exists in a row
+// line      : string from the configuration file
+// return
+//     bool   : true if the string contains a group identifier
+//     string : group identifier
+func (PlatformSpecific) GroupNameExtract(line string) (bool, string) {
+	for _, groupKeyword := range []string{
+		"GPP_A", "GPP_B", "GPP_F",
+		"GPP_C", "GPP_D", "GPP_E",
+		"GPD",   "GPP_I",
+		"GPP_J", "GPP_K",
+		"GPP_G", "GPP_H", "GPP_L",
+	} {
+		if strings.Contains(line, groupKeyword) {
+			return true, groupKeyword
+		}
+	}
+	return false, ""
+}
+
+// KeywordCheck - This function is used to filter parsed lines of the configuration file and
+//                returns true if the keyword is contained in the line.
+// line      : string from the configuration file
+func (PlatformSpecific) KeywordCheck(line string) bool {
+	for _, keyword := range []string{
+		"GPP_", "GPD",
+	} {
+		if strings.Contains(line, keyword) {
+			return true
+		}
+	}
+	return false
+}