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authorYunlong Jia <yunlong.jia@ecs.corp-partner.google.com>2023-07-24 03:06:50 +0000
committerMatt DeVillier <matt.devillier@amd.corp-partner.google.com>2023-07-28 14:22:55 +0000
commitaae52ef4b35a9dd2b27c2fe28083dee4e87e8d05 (patch)
tree25834c96a1ca59240fdfb12de3ad840b15817037 /util/intelp2m/description.md
parentf4e3f15b44f0d0e117781d194f700cc19b3a88c7 (diff)
mb/google/nissa/var/gothrax: Tune SX9324 P-sensor configuration
Update SX9324 register settings based on tuning value from SEMTECH. - Enable GPP_B5/GPP_B6 - Enable GPP_H19 open irq - Adjust register reg_afe_ctrl0/reg_afe_ctrl3/reg_afe_ctrl4 BUG=b:292016304 BRANCH=None TEST=Check register settings and confirm P-sensor function can work. Signed-off-by: Yunlong Jia <yunlong.jia@ecs.corp-partner.google.com> Change-Id: I6f15f7a7c428aee45d35830574ef84aefcae6401 Reviewed-on: https://review.coreboot.org/c/coreboot/+/76711 Reviewed-by: Kyle Lin <kylelinck@google.com> Reviewed-by: Derek Huang <derekhuang@google.com> Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
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