diff options
| author | Chun-Jie Chen <chun-jie.chen@mediatek.corp-partner.google.com> | 2021-09-24 18:41:06 +0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2021-11-05 13:03:10 +0000 |
| commit | 76e0b9d710092f1ad73115643b8bb0dd29f46e59 (patch) | |
| tree | 28b898e9e121af872c2880a7ee44ff87c1cf3864 /util/intelmetool/.gitignore | |
| parent | f1226963a120ee8533e168a12093e08229006db8 (diff) | |
soc/mediatek/mt8186: Add PLL and clock init support
Add PLL and clock init code, frequency meter and APIs for
raising little CPU/CCI frequency.
TEST=build pass
BUG=b:202871018
Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com>
Change-Id: Id46d0708e7ba0c1a4043a5dce33ef69421cb59c5
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58936
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Diffstat (limited to 'util/intelmetool/.gitignore')
0 files changed, 0 insertions, 0 deletions