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authorDominik Geyer <dominik.geyer@kontron.com>2008-05-16 12:55:55 +0000
committerCarl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>2008-05-16 12:55:55 +0000
commitfac0afb87d216e51284b934042cfeb6f27e70864 (patch)
tree1f96fc2a55d9d43fb000f26ab3584102a04aa727 /util/flashrom/chipset_enable.c
parente7b11577641b3f78eda07000583ebdd5e62fed4c (diff)
Add support for SPI chips on ICH9. This is done by using the generic SPI
interface. Signed-off-by: Dominik Geyer <dominik.geyer@kontron.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3325 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'util/flashrom/chipset_enable.c')
-rw-r--r--util/flashrom/chipset_enable.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/util/flashrom/chipset_enable.c b/util/flashrom/chipset_enable.c
index 3dec881ed1..fdcae7be02 100644
--- a/util/flashrom/chipset_enable.c
+++ b/util/flashrom/chipset_enable.c
@@ -198,7 +198,7 @@ static int enable_flash_ich_dc_spi(struct pci_dev *dev, const char *name, unsign
/* Calculate the Root Complex Register Block address */
tmp &= 0xffffc000;
printf_debug("Root Complex Register Block address = 0x%x\n", tmp);
- rcrb = mmap(0, 0x4000, PROT_READ, MAP_SHARED, fd_mem, (off_t)tmp);
+ rcrb = mmap(0, 0x4000, PROT_READ | PROT_WRITE, MAP_SHARED, fd_mem, (off_t)tmp);
if (rcrb == MAP_FAILED) {
perror("Can't mmap memory using " MEM_DEV);
exit(1);