diff options
| author | Nikolay Petukhov <nikolay.petukhov@gmail.com> | 2008-05-17 01:08:58 +0000 |
|---|---|---|
| committer | Peter Stuge <peter@stuge.se> | 2008-05-17 01:08:58 +0000 |
| commit | ce1fb9d4e96d6553ddee1b5bda9a58148c81057c (patch) | |
| tree | a729b5c04c208dd2a6013c296dad48535d6a080e /util/flashrom/Makefile | |
| parent | fb047a6a54ffd872a4059d04a3f2a8b59ae9ab29 (diff) | |
flashrom: Support Pm49FL004/2 Block Locking Registers
The PMC chips understand both LPC and FWH flash commands. When in FWH mode
(MSR_DIVIL_BALL_OPT(0x51400015) = 0x00000f7d on 5536 boards) the Block
Locking Registers by default lock the flash chip for write and erase - in
addition to any chipset write protection.
This patch adds unlock operations before Pm49FL004/2 write and erase, and
it includes an svn mv pm49fl004.c pm49fl00x.c
Thanks go to Nikolay for this patch.
Signed-off-by: Nikolay Petukhov <nikolay.petukhov@gmail.com>
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Bari Ari <bari@onelabs.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3332 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'util/flashrom/Makefile')
| -rw-r--r-- | util/flashrom/Makefile | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/util/flashrom/Makefile b/util/flashrom/Makefile index 35b891db1a..a645d4c560 100644 --- a/util/flashrom/Makefile +++ b/util/flashrom/Makefile @@ -22,7 +22,7 @@ endif OBJS = chipset_enable.o board_enable.o udelay.o jedec.o stm50flw0x0x.c \ sst28sf040.o am29f040b.o mx29f002.o sst39sf020.o m29f400bt.o \ - w49f002u.o 82802ab.o msys_doc.o pm49fl004.o sst49lf040.o \ + w49f002u.o 82802ab.o msys_doc.o pm49fl00x.o sst49lf040.o \ sst49lfxxxc.o sst_fwhub.o layout.o cbtable.o flashchips.o \ flashrom.o w39v080fa.o sharplhf00l04.o w29ee011.o spi.o it87spi.o \ ichspi.o |