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author | Patrick Georgi <patrick@georgi-clan.de> | 2015-03-07 10:57:25 +0100 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2015-03-08 13:56:08 +0100 |
commit | f0bbc95f12c99ac956c9d8a85bac38db4ad6bcb4 (patch) | |
tree | 12ee9ef9acfb5307b068396d9a0de0db3aae4dff /util/crossgcc/buildgcc | |
parent | 53c388fe6dfb4fc4ffcee6c58345d353c6ec33bf (diff) |
crossgcc: Add RISC-V support
Change-Id: If1e0f7ed21f67d7a185dad251ede81ddbc18c4e5
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/8629
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'util/crossgcc/buildgcc')
-rwxr-xr-x | util/crossgcc/buildgcc | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/util/crossgcc/buildgcc b/util/crossgcc/buildgcc index e9936dbaae..8ddeea0f46 100755 --- a/util/crossgcc/buildgcc +++ b/util/crossgcc/buildgcc @@ -230,6 +230,7 @@ case "$TARGETARCH" in i386-elf) ;; i386-mingw32) ;; mipsel-elf) ;; + riscv-elf) ;; i386*) TARGETARCH=i386-elf;; arm*) TARGETARCH=armv7-a-eabi;; aarch64*) TARGETARCH=aarch64-elf;; |