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| author | Lee Leahy <leroy.p.leahy@intel.com> | 2016-09-28 17:16:44 -0700 |
|---|---|---|
| committer | Lee Leahy <leroy.p.leahy@intel.com> | 2016-09-30 01:16:51 +0200 |
| commit | 44ec92a48d4dd40f9cca2da66e875d0665b57215 (patch) | |
| tree | 831c5e45683575424fec5569d8d5943aa7a83f68 /util/chromeos | |
| parent | 54f857b29e7d7fddf4ad2c13a16f624e25349456 (diff) | |
soc/intel/quark: Fix FSP 2.0 build
Fix the build issues with FSP 2.0:
* Remove struct from the various data structures.
* Properly display the serial port UPDs.
* Change chipset_handle_reset parameter type
BRANCH=none
BUG=None
TEST=Build FSP 2.0 (SEC/PEI core with all FSP debug off) and run on
Galileo Gen2
Change-Id: Icae578855006f18e7e5aa18d2fd196d300d0c658
Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com>
Reviewed-on: https://review.coreboot.org/16808
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'util/chromeos')
0 files changed, 0 insertions, 0 deletions