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author | Martin Roth <martinroth@chromium.org> | 2020-10-06 18:11:12 -0600 |
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committer | Edward O'Callaghan <quasisec@chromium.org> | 2020-10-08 01:21:56 +0000 |
commit | 0f3ef704bb8744f12d6c34b57ad7b0270070197a (patch) | |
tree | df59285892015b7381d0b16037b8d2e5a53e66f6 /util/cbmem/description.md | |
parent | 4b34193d59b506132c0b7404fc0183680c7ae39b (diff) |
soc/amd/picasso: Print values from PSP transfer buffer
The PSP will now pass us data on the PSP boot mode and the production
silicon level. Print these values out to save in the log.
These definitions are in a vendorcode include directory that was
previously only included in verstage. Add the include directory
to all stages.
BUG=b:170237834
TEST=Build & Boot - See values printed.
BRANCH=Zork
Signed-off-by: Martin Roth <martinroth@chromium.org>
Change-Id: Iee87413d1473786cf0e148a8088d27f8d24a47a1
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46113
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Reviewed-by: Sam McNally <sammc@google.com>
Diffstat (limited to 'util/cbmem/description.md')
0 files changed, 0 insertions, 0 deletions