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author | Felix Held <felix-coreboot@felixheld.de> | 2023-03-20 22:22:54 +0100 |
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committer | Felix Held <felix-coreboot@felixheld.de> | 2023-03-21 23:34:33 +0000 |
commit | 7561360e7246ead88a299b91e141fce76b9fee66 (patch) | |
tree | f3c026b63533eed98856eb786d98ee5dea4ce14b /util/bincfg/gbe-82579LM.set | |
parent | 08391d2f5ffea38aa95152c53492f72261786714 (diff) |
soc/intel/xeon_sp/spr/cpu: add missing device_match_mask in CPU table
Commit 6a6ac1e0b929 ("arch/x86/cpu: introduce and use
device_match_mask") added the device_match_mask element to the
cpu_device_id struct and uses it to be able to mask off for example the
stepping ID when checking for CPU table entry that matches the silicon
the code is running on. Commit 3ed903fda9cb ("soc/intel/xeon_sp/spr: Add
Sapphire Rapids ramstage code") added a CPU table that was missing the
device_match_mask which results in this being 0, so the first entry of
the CPU table would match for any Intel CPU which isn't the intended
behavior. Also use CPU_TABLE_END instead of the final {0, 0, 0} array
element.
Likely all entries could be replaced by one entry that uses the
CPUID_ALL_STEPPINGS_MASK instead of the CPUID_EXACT_MATCH_MASK, but
that's out of scope for this fix.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Ib0be2e9fe3c31487c83c9b1cf305a985416760b5
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73835
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
Diffstat (limited to 'util/bincfg/gbe-82579LM.set')
0 files changed, 0 insertions, 0 deletions