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| author | Keith Hui <buurin@gmail.com> | 2024-05-25 19:27:32 -0400 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2024-06-12 12:34:37 +0000 |
| commit | f883855cd7f79646b2e6111dff6aa46ff0eb2eb0 (patch) | |
| tree | 7504114406c2f511446de8a5f335b4d2a8140513 /util/autoport | |
| parent | 1d74c0d5f34d3489f57012625c08eb7d16f09ad3 (diff) | |
util/autoport: Update for recent USB developments
Update autoport for:
1. Commit ee126348726b ("nb/sandybridge,sb/bd82x6x: Configure USB from
southbridge devicetree")
2. Commit 94625d2aae76 ("sb/intel/bd82x6x: Allow actual USBIRx values
for native USB config")
As a side effect of #2 above, no more (broken anyway) FIXME comment
will be written for usb_port_config.
Change-Id: I3b8f44d9de19a7446e2fbcbce1aab6ec6583ebe3
Signed-off-by: Keith Hui <buurin@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/82656
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'util/autoport')
| -rw-r--r-- | util/autoport/bd82x6x.go | 24 |
1 files changed, 13 insertions, 11 deletions
diff --git a/util/autoport/bd82x6x.go b/util/autoport/bd82x6x.go index a4ae2459b5..00b136b03a 100644 --- a/util/autoport/bd82x6x.go +++ b/util/autoport/bd82x6x.go @@ -294,13 +294,12 @@ func (b bd82x6x) Scan(ctx Context, addr PCIDevData) { defer sb.Close() Add_gpl(sb) - sb.WriteString(` -#include <bootblock_common.h> + sb.WriteString(`#include <bootblock_common.h> #include <device/pci_ops.h> #include <southbridge/intel/bd82x6x/pch.h> `) - sb.WriteString("const struct southbridge_usb_port mainboard_usb_ports[] = {\n") + usbPortConfig := "{\n" currentMap := map[uint32]int{ 0x20000153: 0, @@ -331,17 +330,20 @@ func (b bd82x6x) Scan(ctx Context, addr PCIDevData) { } } current, ok := currentMap[inteltool.RCBA[uint16(0x3500+4*port)]] - comment := "" if !ok { - comment = fmt.Sprintf("// FIXME: Unknown current: RCBA(0x%x)=0x%x", 0x3500+4*port, uint16(0x3500+4*port)) + usbPortConfig += fmt.Sprintf("\t\t\t\t{%d, 0x%x, %d},\n", + ((inteltool.RCBA[0x359c]>>port)&1)^1, + inteltool.RCBA[uint16(0x3500+4*port)] & 0xfff, + OCPin) + } else { + usbPortConfig += fmt.Sprintf("\t\t\t\t{%d, %d, %d},\n", + ((inteltool.RCBA[0x359c]>>port)&1)^1, + current, + OCPin) } - fmt.Fprintf(sb, "\t{ %d, %d, %d }, %s\n", - ((inteltool.RCBA[0x359c]>>port)&1)^1, - current, - OCPin, - comment) } - sb.WriteString("};\n") + usbPortConfig += "\t\t\t}" + cur.Registers["usb_port_config"] = usbPortConfig sb.WriteString(` void bootblock_mainboard_early_init(void) |