soc/intel/cannonlake: Remove depreciated UPD selection

Several FSP silicon init UPD have been moved to memory init stage, modify
the coreboot accordingly. The UPDs below are affected:
    SkipMpInit
    VtdBaseAddress
    VtdDisable
    X2ApicOptOut

BUG=N/A
TEST=Build pass with FSP revision 7.0.47.50.

Change-Id: Ic0416dcd9ea1fe063cdd0c2f27257cd4cb4ba7e8
Signed-off-by: Lijian Zhao <lijian.zhao@intel.com>
Reviewed-on: https://review.coreboot.org/29260
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

0 files changed, 0 insertions, 0 deletions