diff options
| author | Bora Guvendik <bora.guvendik@intel.com> | 2021-09-26 17:25:48 -0700 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-03-10 23:23:13 +0000 |
| commit | 860672e9879e52820d453e3bc41d151116facb1a (patch) | |
| tree | fa47e3a3cb910311d825eb2c436f2adf9306d59f /util/acpi | |
| parent | 9df00851938eeb227fd019be8d0866655414f62e (diff) | |
soc/intel/alderlake: Inject CSE TS into CBMEM timestamp table
Get boot performance timestamps from CSE and inject them into CBMEM
timestamp table after normalizing to the zero-point value. Although
consumer CSE sku also supports this feature, it was validated on
CSE Lite sku only.
BUG=b:182575295
TEST=Able to see TS elapse prior to IA reset on Brya/Redrix
990:CSME ROM started execution 0
944:CSE sent 'Boot Stall Done' to PMC 88,000
945:CSE started to handle ICC configuration 88,000 (0)
946:CSE sent 'Host BIOS Prep Done' to PMC 90,000 (2,000)
947:CSE received 'CPU Reset Done Ack sent' from PMC 282,000 (192,000)
0:1st timestamp 330,857 (48,857)
11:start of bootblock 341,811 (10,953)
12:end of bootblock 349,299 (7,487)
Signed-off-by: Bora Guvendik <bora.guvendik@intel.com>
Change-Id: Idcdbb69538ca2977cd97ce1ef9b211ff6510a3f8
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59507
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'util/acpi')
0 files changed, 0 insertions, 0 deletions