soc/intel/xeon_sp: Share DDR codes across Xeon-SP platforms

DDR support codes across generations are similar. Share the codes
to improve code reuse.

TEST=intel/archercity CRB

Change-Id: I237d561003671d70dfaaa9823a0cf16d6e1f50cf
Signed-off-by: Jincheng Li <jincheng.li@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/81219
Reviewed-by: Shuo Liu <shuo.liu@intel.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <patrick.rudolph@9elements.com>

0 files changed, 0 insertions, 0 deletions