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authorBen Chuang <benchuanggli@gmail.com>2022-03-18 15:56:31 +0800
committerMartin L Roth <martinroth@google.com>2022-03-22 03:45:30 +0000
commit15854c91341458222f1ac9801fa21c9dd830fb13 (patch)
tree2c24e533a8c3f3e24b1f8784f44cffa6ccb19005 /tests/data
parente8c186cdef27f33cbe022a8ef53d4802f1dc71c9 (diff)
drivers/genesyslogic/gl9763e: Add set L1 entry delay to Max for GL9763E
Add an option to set L1 entry delay to Max for GL9763E. The L1 entry delay will be changed to expected value by sdhci-pci-gli driver in Linux v5.14. BUG=b:220079865 TEST=build and verify the value of GL9763E's 0x8A4[28:19] register is 0x3FF. Change-Id: I19d4dfb7b873d09ff30ad4d2d63b876047c21601 Signed-off-by: Ben Chuang <benchuanggli@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/62917 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Subrata Banik <subratabanik@google.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Peichao Wang <pwang12@lenovo.corp-partner.google.com> Reviewed-by: Martin L Roth <martinroth@google.com>
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