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authorBill XIE <persmule@hardenedlinux.org>2023-10-07 01:32:51 +0800
committerFelix Held <felix-coreboot@felixheld.de>2023-10-23 12:58:40 +0000
commit29030d0f3dad2ec6b86000dfe2c8e951ae80bf94 (patch)
treef8620334adc85498be5084cd12dc175101238e92 /tests/Makefile.inc
parent51eee89c783e3f7200c520c907b67983ec9d5a2e (diff)
drivers/pc80/rtc/option.c: Stop resetting CMOS during s3 resume
After commit e12b313844da ("drivers/pc80/rtc/option.c: Allow CMOS defaults to extend to bank 1"), Thinkpad X200 with CONFIG(STATIC_OPTION_TABLE) can no longer resume from s3 (detected via bisect). Further inspection shows that DRAM training result of GM45 is stored in CMOS above 128 bytes in raminit_read_write_training.c, for s3 resume to restore, but it will be erased by sanitize_cmos(), which now clears both bank 0 and bank 1, leaving only "untrained" result restored, so s3 resume will fail. However, resetting CMOS seems unnecessary during s3 resume. Now, cmos_need_reset will be negated when acpi_is_wakeup_s3() returns true. Tested: Thinkpad X200 with CONFIG(STATIC_OPTION_TABLE) can resume from s3 again with these changes. Change-Id: I533e83f3b95f327b0e24f4d750f8812325b7770b Signed-off-by: Bill XIE <persmule@hardenedlinux.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/78288 Reviewed-by: Jonathon Hall <jonathon.hall@puri.sm> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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