diff options
| author | Stefan Reinauer <stepan@coresystems.de> | 2008-01-18 15:08:58 +0000 |
|---|---|---|
| committer | Stefan Reinauer <stepan@openbios.org> | 2008-01-18 15:08:58 +0000 |
| commit | f8ee1806ac524bc782c93eccc59ee3c929abddb9 (patch) | |
| tree | 7daab6b3aa82476a10d38fbf68068f4a409d2ce9 /targets/iwill/dk8s2 | |
| parent | 7e61e45402aba2b90997f4f02ca8266cf65a229a (diff) | |
Rename almost all occurences of LinuxBIOS to coreboot.
Due to the automatic nature of this update, I am self-acking. It worked in
abuild.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3053 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'targets/iwill/dk8s2')
| -rw-r--r-- | targets/iwill/dk8s2/Config.lb | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/targets/iwill/dk8s2/Config.lb b/targets/iwill/dk8s2/Config.lb index ced9197fd5..3f18f54b9a 100644 --- a/targets/iwill/dk8s2/Config.lb +++ b/targets/iwill/dk8s2/Config.lb @@ -57,18 +57,18 @@ option MAINBOARD_VENDOR="IWILL" # ### ### Compute the location and size of where this firmware image -### (linuxBIOS plus bootloader) will live in the boot rom chip. +### (coreboot plus bootloader) will live in the boot rom chip. ### #option FALLBACK_SIZE=524288 #option FALLBACK_SIZE=98304 option FALLBACK_SIZE=131072 -## ROM_IMAGE_SIZE is the amount of space to allow linuxBIOS to occupy. +## ROM_IMAGE_SIZE is the amount of space to allow coreboot to occupy. option ROM_IMAGE_SIZE=65536 ### -### Compute where this copy of linuxBIOS will start in the boot rom +### Compute where this copy of coreboot will start in the boot rom ### # ### @@ -80,7 +80,7 @@ option CONFIG_CONSOLE_SERIAL8250=1 option TTYS0_BAUD=115200 ## -### Select the linuxBIOS loglevel +### Select the coreboot loglevel ## ## EMERG 1 system is unusable ## ALERT 2 action must be taken immediately @@ -101,7 +101,7 @@ option MAXIMUM_CONSOLE_LOGLEVEL=7 # -## LinuxBIOS C code runs at this location in RAM +## Coreboot C code runs at this location in RAM option _RAMBASE=0x004000 ## @@ -117,7 +117,7 @@ option HEAP_SIZE=0xe000 # ### ### Compute the start location and size size of -### The linuxBIOS bootloader. +### The coreboot bootloader. ### option CONFIG_ROM_PAYLOAD = 1 @@ -128,7 +128,7 @@ romimage "normal" # option ROM_SIZE = 512*1024-48*1024 # 48K for SCSI FW and 48K for ATI ROM # option ROM_SIZE = 512*1024-48*1024-48*1024 - option LINUXBIOS_EXTRA_VERSION="$(shell cat ../../VERSION)_Normal" + option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Normal" option USE_FALLBACK_IMAGE=0 option ROM_SECTION_SIZE = (ROM_SIZE - FALLBACK_SIZE) option ROM_SECTION_OFFSET= 0 @@ -147,7 +147,7 @@ romimage "normal" end romimage "fallback" - option LINUXBIOS_EXTRA_VERSION="$(shell cat ../../VERSION)_Fallback" + option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Fallback" option USE_FALLBACK_IMAGE=1 option ROM_SECTION_SIZE = FALLBACK_SIZE option ROM_SECTION_OFFSET= (ROM_SIZE - FALLBACK_SIZE) @@ -164,4 +164,4 @@ romimage "fallback" # payload /usr/src/filo-0.4.2/filo.elf end -buildrom ./linuxbios.rom ROM_SIZE "normal" "fallback" +buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" |