diff options
author | Dmitry Ponamorev <dponamorev@gmail.com> | 2021-09-15 03:28:52 -0700 |
---|---|---|
committer | Werner Zeh <werner.zeh@siemens.com> | 2021-10-07 04:40:31 +0000 |
commit | fba1475f25948aebd0590436e33bb266d6e714d9 (patch) | |
tree | e46bcac14ff06c300084434261bcb5b70001d216 /src | |
parent | c003ea6d2b33f4ecb091aa631569792a287043a0 (diff) |
soc/intel/denverton_ns: Always enable SpeedStep
When "SpeedStep" is disabled on an Intel Atom C3538,
the maximum CPU clock speed is always 800 MHz(min CPU clock).
Оperating system cannot change the frequency.
Avoid this issue allow "Intel Speed step" technology
for processors that do not have "Intel Turbo Boost".
Signed-off-by: Dmitry Ponamorev <dponamorev@gmail.com>
Change-Id: Ia922e45c12e4239f1d59617193cdbde2a813e7d0
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57669
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: King Sumo <kingsumos@gmail.com>
Diffstat (limited to 'src')
-rw-r--r-- | src/soc/intel/denverton_ns/cpu.c | 10 |
1 files changed, 4 insertions, 6 deletions
diff --git a/src/soc/intel/denverton_ns/cpu.c b/src/soc/intel/denverton_ns/cpu.c index 10e79be3b5..95f164d1c5 100644 --- a/src/soc/intel/denverton_ns/cpu.c +++ b/src/soc/intel/denverton_ns/cpu.c @@ -90,12 +90,10 @@ static void denverton_core_init(struct device *cpu) /* Enable Turbo */ enable_turbo(); - /* Enable speed step. */ - if (get_turbo_state() == TURBO_ENABLED) { - msr = rdmsr(IA32_MISC_ENABLE); - msr.lo |= SPEED_STEP_ENABLE_BIT; - wrmsr(IA32_MISC_ENABLE, msr); - } + /* Enable speed step. Always ON.*/ + msr = rdmsr(IA32_MISC_ENABLE); + msr.lo |= SPEED_STEP_ENABLE_BIT; + wrmsr(IA32_MISC_ENABLE, msr); } static struct device_operations cpu_dev_ops = { |