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authorMarshall Dawson <marshalldawson3rd@gmail.com>2017-09-27 14:51:30 -0600
committerMartin Roth <martinroth@google.com>2017-10-02 22:27:00 +0000
commitf7ace0da45d37da9482df3b0e38fe3cabbb9a1c0 (patch)
tree2de705f3b3b9d87e8c8af82e52ae232d4790c3eb /src
parent9db0a2dcc8925d1680a5bf223c589ff2db9eca28 (diff)
amd/stoneyridge: Fix pm_read16 argument size
Make pm_read16() consistent with the other PM register access functions. Change-Id: Iba017b8090ed07d8684cc7f396a3e9a942b3ad95 Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-on: https://review.coreboot.org/21748 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-by: Marc Jones <marc@marcjonesconsulting.com>
Diffstat (limited to 'src')
-rw-r--r--src/soc/amd/stoneyridge/include/soc/southbridge.h2
-rw-r--r--src/soc/amd/stoneyridge/southbridge.c2
2 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/amd/stoneyridge/include/soc/southbridge.h b/src/soc/amd/stoneyridge/include/soc/southbridge.h
index 9f353fbdfd..aa93e47ed2 100644
--- a/src/soc/amd/stoneyridge/include/soc/southbridge.h
+++ b/src/soc/amd/stoneyridge/include/soc/southbridge.h
@@ -189,7 +189,7 @@ void sb_tpm_decode_spi(void);
void lpc_wideio_512_window(uint16_t base);
void lpc_wideio_16_window(uint16_t base);
u8 pm_read8(u8 reg);
-u16 pm_read16(u16 reg);
+u16 pm_read16(u8 reg);
void pm_write8(u8 reg, u8 value);
void pm_write16(u8 reg, u16 value);
int s3_load_nvram_early(int size, u32 *old_dword, int nvram_pos);
diff --git a/src/soc/amd/stoneyridge/southbridge.c b/src/soc/amd/stoneyridge/southbridge.c
index 92a1defb94..ebda770be2 100644
--- a/src/soc/amd/stoneyridge/southbridge.c
+++ b/src/soc/amd/stoneyridge/southbridge.c
@@ -53,7 +53,7 @@ void pm_write16(u8 reg, u16 value)
write16((void *)(PM_MMIO_BASE + reg), value);
}
-u16 pm_read16(u16 reg)
+u16 pm_read16(u8 reg)
{
return read16((void *)(PM_MMIO_BASE + reg));
}