diff options
| author | Kun Liu <liukun11@huaqin.corp-partner.google.com> | 2024-10-09 10:24:34 +0800 |
|---|---|---|
| committer | Subrata Banik <subratabanik@google.com> | 2024-10-13 04:32:32 +0000 |
| commit | f301e22f9402f8059479999b0cffb535037ac66d (patch) | |
| tree | 529fcc8fab92067c1fb9d493ddf5e79aa07799da /src | |
| parent | f96fcd6a6632d7522aff79e85c25efd77ce852d0 (diff) | |
mb/google/brox/var/lotso: Reduce gspi speed from 10 MHz to 9 MHz
Reduce gspi speed from 10 MHz to 9 MHz, because Raptor
Lake Refresh platform GSPI supports max frequency 9 MHz.
BUG=b:342932183
TEST=emerge-brox coreboot
Change-Id: If5b7885d95cfe21ec71cc37e6d72419935b0844f
Signed-off-by: Kun Liu <liukun11@huaqin.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84708
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Reviewed-by: Jian Tong <tongjian@huaqin.corp-partner.google.com>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
| -rw-r--r-- | src/mainboard/google/brox/variants/lotso/overridetree.cb | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/google/brox/variants/lotso/overridetree.cb b/src/mainboard/google/brox/variants/lotso/overridetree.cb index 60e258a34a..9aec7b944f 100644 --- a/src/mainboard/google/brox/variants/lotso/overridetree.cb +++ b/src/mainboard/google/brox/variants/lotso/overridetree.cb @@ -418,7 +418,7 @@ chip soc/intel/alderlake register "hid" = ""GXTS7986"" register "uid" = "0x3" register "irq" = "ACPI_IRQ_WAKE_EDGE_LOW(GPP_F18_IRQ)" - register "speed" = "10 * MHz" + register "speed" = "9 * MHz" register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_F17)" register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_F7)" register "property_count" = "1" |