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authorArthur Heymans <arthur@aheymans.xyz>2016-11-12 20:13:07 +0100
committerNico Huber <nico.h@gmx.de>2016-11-15 13:09:08 +0100
commiteeaf9e4687249c73fb93efc4fdc12215210efcdf (patch)
treedc27401f971825906b8a256d4e0a691fe0e97945 /src
parentbce8bb6e6ce5045ea611dae96857cf93d596a86c (diff)
nb/gm45: Refactor IGD vram decoding
This is more consistent with other Intel GMCH code. Change-Id: I7bfaa79b9031e2dcc5879a607cadacbdd22ebde7 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/17405 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src')
-rw-r--r--src/northbridge/intel/gm45/ram_calc.c42
1 files changed, 11 insertions, 31 deletions
diff --git a/src/northbridge/intel/gm45/ram_calc.c b/src/northbridge/intel/gm45/ram_calc.c
index 92f1a7f7e3..146bcf2c7f 100644
--- a/src/northbridge/intel/gm45/ram_calc.c
+++ b/src/northbridge/intel/gm45/ram_calc.c
@@ -25,40 +25,20 @@
#include <cbmem.h>
#include "gm45.h"
-/** Decodes used Graphics Mode Select (GMS) to kilobytes. */
+/*
+ * Decodes used Graphics Mode Select (GMS) to kilobytes.
+ * The options for 1M, 4M, 8M and 16M preallocated igd memory are
+ * undocumented but are verified to work.
+ */
u32 decode_igd_memory_size(const u32 gms)
{
- switch (gms) {
- case 1:
- return 1 << 10;
- case 2:
- return 4 << 10; /* guessed */
- case 3:
- return 8 << 10; /* guessed */
- case 4:
- return 16 << 10;
- case 5:
- return 32 << 10;
- case 6:
- return 48 << 10;
- case 7:
- return 64 << 10;
- case 8:
- return 128 << 10;
- case 9:
- return 256 << 10;
- case 10:
- return 96 << 10;
- case 11:
- return 160 << 10;
- case 12:
- return 224 << 10;
- case 13:
- return 352 << 10;
- default:
+ static const u16 ggc2uma[] = { 0, 1, 4, 8, 16, 32, 48, 64, 128, 256,
+ 96, 160, 224, 352 };
+
+ if (gms > ARRAY_SIZE(ggc2uma))
die("Bad Graphics Mode Select (GMS) setting.\n");
- return 0;
- }
+
+ return ggc2uma[gms] << 10;
}
/** Decodes used Graphics Stolen Memory (GSM) to kilobytes. */