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authorMatt DeVillier <matt.devillier@amd.corp-partner.google.com>2022-08-18 13:46:22 -0500
committerFelix Held <felix-coreboot@felixheld.de>2022-08-20 04:33:35 +0000
commite943e9fc241a50494ff846dce01da33468fe989b (patch)
tree4bec432f3ab2504883b64f1efe74b17dce465f6a /src
parenta0b92b019f3a8712b8ffdc56a771d03def1fc08d (diff)
soc/amd/common/dmi: Add missing newline in printk
Change-Id: I35dd9a2f0520077913bd3d8f408206dea1b30acb Signed-off-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/66867 Reviewed-by: Raul Rangel <rrangel@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src')
-rw-r--r--src/soc/amd/common/fsp/dmi.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/amd/common/fsp/dmi.c b/src/soc/amd/common/fsp/dmi.c
index 5596f97306..b500155a03 100644
--- a/src/soc/amd/common/fsp/dmi.c
+++ b/src/soc/amd/common/fsp/dmi.c
@@ -28,7 +28,7 @@ static uint16_t ddr_speed_mhz_to_reported_mts(uint16_t ddr_type, uint16_t speed)
case MEMORY_TYPE_LPDDR4:
return lpddr4_speed_mhz_to_reported_mts(speed);
default:
- printk(BIOS_ERR, "Unknown memory type %x", ddr_type);
+ printk(BIOS_ERR, "Unknown memory type %x\n", ddr_type);
return 0;
}
}