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authorAngel Pons <th3fanbus@gmail.com>2020-07-26 17:21:57 +0200
committerAngel Pons <th3fanbus@gmail.com>2020-08-07 10:12:27 +0000
commite8c8283a267696fad92a139cdd3fe3395051b7d7 (patch)
tree8faaeb9cb6577baae04d1ee6540966268ad92ea1 /src
parentdefdc8539ba11207a7b2a330cc4b6d0474b6f1fb (diff)
mb/intel/kblrvp: Factor out `IoBufferOwnership`
RVP11 and RVP3 set it to zero, the other two omit the setting. Tested with BUILD_TIMELESS=1, all four variants do not change. Change-Id: I6b393f0f2269f62b415456c17ba5962f46a1c5d1 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/43909 Reviewed-by: Subrata Banik <subrata.banik@intel.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/intel/kblrvp/variants/baseboard/devicetree.cb1
-rw-r--r--src/mainboard/intel/kblrvp/variants/rvp11/overridetree.cb1
-rw-r--r--src/mainboard/intel/kblrvp/variants/rvp3/overridetree.cb1
3 files changed, 1 insertions, 2 deletions
diff --git a/src/mainboard/intel/kblrvp/variants/baseboard/devicetree.cb b/src/mainboard/intel/kblrvp/variants/baseboard/devicetree.cb
index 580f5b0eae..231fbadae4 100644
--- a/src/mainboard/intel/kblrvp/variants/baseboard/devicetree.cb
+++ b/src/mainboard/intel/kblrvp/variants/baseboard/devicetree.cb
@@ -24,6 +24,7 @@ chip soc/intel/skylake
# FSP Configuration
register "HeciEnabled" = "0"
+ register "IoBufferOwnership" = "0"
register "ScsEmmcHs400Enabled" = "1"
register "ScsSdCardEnabled" = "2"
register "SkipExtGfxScan" = "1"
diff --git a/src/mainboard/intel/kblrvp/variants/rvp11/overridetree.cb b/src/mainboard/intel/kblrvp/variants/rvp11/overridetree.cb
index cfb50e3e20..ad9dd3622c 100644
--- a/src/mainboard/intel/kblrvp/variants/rvp11/overridetree.cb
+++ b/src/mainboard/intel/kblrvp/variants/rvp11/overridetree.cb
@@ -2,7 +2,6 @@ chip soc/intel/skylake
# FSP Configuration
register "DspEnable" = "0"
- register "IoBufferOwnership" = "0"
register "ScsEmmcHs400Enabled" = "0"
register "ScsSdCardEnabled" = "0"
register "Device4Enable" = "0"
diff --git a/src/mainboard/intel/kblrvp/variants/rvp3/overridetree.cb b/src/mainboard/intel/kblrvp/variants/rvp3/overridetree.cb
index 4c2225a8ae..ea3d814e20 100644
--- a/src/mainboard/intel/kblrvp/variants/rvp3/overridetree.cb
+++ b/src/mainboard/intel/kblrvp/variants/rvp3/overridetree.cb
@@ -8,7 +8,6 @@ chip soc/intel/skylake
# FSP Configuration
register "DspEnable" = "1"
- register "IoBufferOwnership" = "0"
register "PmTimerDisabled" = "1"
register "Cio2Enable" = "1"
register "SaImguEnable" = "1"