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authorFred Reitberger <reitbergerfred@gmail.com>2023-06-23 09:59:18 -0400
committerFelix Held <felix-coreboot@felixheld.de>2023-07-06 13:56:21 +0000
commite8696e1b079454d3f5753564037bd886701da8f1 (patch)
tree99cd36d10f02c76c562c7d0fd6d84aebd732a6a7 /src
parent0ec7a9f1740003e013c1f26262efef3734aebeb1 (diff)
mb/amd/birman/Kconfig: Select SPI_FLASH_EXIT_4_BYTE_ADDR_MODE
Always exit 4-byte addressing mode to prevent errors when the spi flash is not left in 4-byte addressing mode. TEST=boot with PSP releases that leave the flash in both 4-byte and 3-byte mode and verify flash writes Signed-off-by: Fred Reitberger <reitbergerfred@gmail.com> Change-Id: I9884b85bc3b0a9b654a2cb91fb314b0869abd622 Reviewed-on: https://review.coreboot.org/c/coreboot/+/76094 Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/amd/birman/Kconfig2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/amd/birman/Kconfig b/src/mainboard/amd/birman/Kconfig
index d7fd1a5a4c..32967b19c8 100644
--- a/src/mainboard/amd/birman/Kconfig
+++ b/src/mainboard/amd/birman/Kconfig
@@ -15,7 +15,7 @@ config BOARD_SPECIFIC_OPTIONS
select PCIEXP_L1_SUB_STATE
select SOC_AMD_COMMON_BLOCK_ESPI_RETAIN_PORT80_EN if !SOC_AMD_COMMON_BLOCK_SIMNOW_BUILD
select SOC_AMD_COMMON_BLOCK_SIMNOW_SUPPORTED
- select SPI_FLASH_FORCE_4_BYTE_ADDR_MODE
+ select SPI_FLASH_EXIT_4_BYTE_ADDR_MODE
config FMDFILE
default "src/mainboard/amd/birman/chromeos_glinda.fmd" if CHROMEOS && BOARD_AMD_BIRMAN_GLINDA