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authorReka Norman <rekanorman@google.com>2021-12-20 10:24:55 +1100
committerTim Wawrzynczak <twawrzynczak@chromium.org>2022-01-04 16:18:26 +0000
commite7640ccadd2ea2cc2e63b0d6164a83c4608f23fd (patch)
tree6cce216be9f15c013cb73ae77ccf8a95761f1483 /src
parentf1edd4fe6070f961fc150670593bc3f22e6f8a7d (diff)
mb/google/brya: Add new baseboard nissa with variants nivviks and nereid
Add a new baseboard for nissa, an Intel ADL-N based reference design. Also, add variants for the two reference boards, nivviks and nereid. This commit is a stub which only adds the minimum code needed for a successful build. BUG=b:197479026 TEST=abuild -a -x -c max -p none -t google/brya -b nivviks abuild -a -x -c max -p none -t google/brya -b nereid Change-Id: I2a3975fb7a45577fec8ea7c6c9f6ea042ab8cba5 Signed-off-by: Reka Norman <rekanorman@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60271 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kangheui Won <khwon@chromium.org> Reviewed-by: Subrata Banik <subratabanik@google.com>
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/google/brya/Kconfig15
-rw-r--r--src/mainboard/google/brya/Kconfig.name8
-rw-r--r--src/mainboard/google/brya/variants/baseboard/nissa/Makefile.inc6
-rw-r--r--src/mainboard/google/brya/variants/baseboard/nissa/devicetree.cb4
-rw-r--r--src/mainboard/google/brya/variants/baseboard/nissa/gpio.c51
-rw-r--r--src/mainboard/google/brya/variants/baseboard/nissa/include/baseboard/ec.h18
-rw-r--r--src/mainboard/google/brya/variants/baseboard/nissa/include/baseboard/gpio.h15
-rw-r--r--src/mainboard/google/brya/variants/baseboard/nissa/memory.c22
-rw-r--r--src/mainboard/google/brya/variants/nereid/include/variant/ec.h8
-rw-r--r--src/mainboard/google/brya/variants/nereid/include/variant/gpio.h8
-rw-r--r--src/mainboard/google/brya/variants/nereid/overridetree.cb4
-rw-r--r--src/mainboard/google/brya/variants/nivviks/include/variant/ec.h8
-rw-r--r--src/mainboard/google/brya/variants/nivviks/include/variant/gpio.h8
-rw-r--r--src/mainboard/google/brya/variants/nivviks/overridetree.cb4
14 files changed, 179 insertions, 0 deletions
diff --git a/src/mainboard/google/brya/Kconfig b/src/mainboard/google/brya/Kconfig
index ea4498abea..5169324b5c 100644
--- a/src/mainboard/google/brya/Kconfig
+++ b/src/mainboard/google/brya/Kconfig
@@ -53,12 +53,20 @@ config BOARD_GOOGLE_BASEBOARD_BRASK
select SOC_INTEL_ALDERLAKE_PCH_P
select SPD_CACHE_IN_FMAP
+config BOARD_GOOGLE_BASEBOARD_NISSA
+ def_bool n
+ select BOARD_GOOGLE_BRYA_COMMON
+ select CHROMEOS_DRAM_PART_NUMBER_IN_CBI if CHROMEOS
+ select SOC_INTEL_ALDERLAKE_PCH_N
+ select SYSTEM_TYPE_LAPTOP
+
if BOARD_GOOGLE_BRYA_COMMON
config BASEBOARD_DIR
string
default "brya" if BOARD_GOOGLE_BASEBOARD_BRYA
default "brask" if BOARD_GOOGLE_BASEBOARD_BRASK
+ default "nissa" if BOARD_GOOGLE_BASEBOARD_NISSA
config CHROMEOS
select EC_GOOGLE_CHROMEEC_SWITCHES
@@ -94,6 +102,8 @@ config DRIVER_TPM_I2C_BUS
default 0x3 if BOARD_GOOGLE_ANAHERA4ES
default 0x3 if BOARD_GOOGLE_VELL
default 0x3 if BOARD_GOOGLE_TANIKS
+ default 0x0 if BOARD_GOOGLE_NIVVIKS
+ default 0x0 if BOARD_GOOGLE_NEREID
config DRIVER_TPM_I2C_ADDR
hex
@@ -113,6 +123,7 @@ config MAINBOARD_FAMILY
string
default "Google_Brya" if BOARD_GOOGLE_BASEBOARD_BRYA
default "Google_Brask" if BOARD_GOOGLE_BASEBOARD_BRASK
+ default "Google_Nissa" if BOARD_GOOGLE_BASEBOARD_NISSA
config MAINBOARD_PART_NUMBER
default "Brya" if BOARD_GOOGLE_BRYA0
@@ -132,6 +143,8 @@ config MAINBOARD_PART_NUMBER
default "Anahera4ES" if BOARD_GOOGLE_ANAHERA4ES
default "Vell" if BOARD_GOOGLE_VELL
default "Taniks" if BOARD_GOOGLE_TANIKS
+ default "Nivviks" if BOARD_GOOGLE_NIVVIKS
+ default "Nereid" if BOARD_GOOGLE_NEREID
config VARIANT_DIR
default "brya0" if BOARD_GOOGLE_BRYA0
@@ -151,6 +164,8 @@ config VARIANT_DIR
default "anahera4es" if BOARD_GOOGLE_ANAHERA4ES
default "vell" if BOARD_GOOGLE_VELL
default "taniks" if BOARD_GOOGLE_TANIKS
+ default "nivviks" if BOARD_GOOGLE_NIVVIKS
+ default "nereid" if BOARD_GOOGLE_NEREID
config VBOOT
select VBOOT_EARLY_EC_SYNC
diff --git a/src/mainboard/google/brya/Kconfig.name b/src/mainboard/google/brya/Kconfig.name
index 794bfe72e0..e2a4a9e4a7 100644
--- a/src/mainboard/google/brya/Kconfig.name
+++ b/src/mainboard/google/brya/Kconfig.name
@@ -135,3 +135,11 @@ config BOARD_GOOGLE_TANIKS
bool "-> Taniks"
select BOARD_GOOGLE_BASEBOARD_BRYA
select DRIVERS_GENESYSLOGIC_GL9763E
+
+config BOARD_GOOGLE_NIVVIKS
+ bool "-> Nivviks"
+ select BOARD_GOOGLE_BASEBOARD_NISSA
+
+config BOARD_GOOGLE_NEREID
+ bool "-> Nereid"
+ select BOARD_GOOGLE_BASEBOARD_NISSA
diff --git a/src/mainboard/google/brya/variants/baseboard/nissa/Makefile.inc b/src/mainboard/google/brya/variants/baseboard/nissa/Makefile.inc
new file mode 100644
index 0000000000..1693d2e263
--- /dev/null
+++ b/src/mainboard/google/brya/variants/baseboard/nissa/Makefile.inc
@@ -0,0 +1,6 @@
+bootblock-y += gpio.c
+
+romstage-y += memory.c
+romstage-y += gpio.c
+
+ramstage-y += gpio.c
diff --git a/src/mainboard/google/brya/variants/baseboard/nissa/devicetree.cb b/src/mainboard/google/brya/variants/baseboard/nissa/devicetree.cb
new file mode 100644
index 0000000000..a5e2217fef
--- /dev/null
+++ b/src/mainboard/google/brya/variants/baseboard/nissa/devicetree.cb
@@ -0,0 +1,4 @@
+chip soc/intel/alderlake
+ device domain 0 on
+ end
+end
diff --git a/src/mainboard/google/brya/variants/baseboard/nissa/gpio.c b/src/mainboard/google/brya/variants/baseboard/nissa/gpio.c
new file mode 100644
index 0000000000..9471031014
--- /dev/null
+++ b/src/mainboard/google/brya/variants/baseboard/nissa/gpio.c
@@ -0,0 +1,51 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+#include <baseboard/gpio.h>
+#include <baseboard/variants.h>
+#include <types.h>
+#include <soc/gpio.h>
+#include <vendorcode/google/chromeos/chromeos.h>
+
+/* Pad configuration in ramstage */
+static const struct pad_config gpio_table[] = {
+ /* TODO */
+};
+
+/* Early pad configuration in bootblock */
+static const struct pad_config early_gpio_table[] = {
+ /* TODO */
+};
+
+const struct pad_config *__weak variant_gpio_table(size_t *num)
+{
+ *num = ARRAY_SIZE(gpio_table);
+ return gpio_table;
+}
+
+const struct pad_config *__weak variant_gpio_override_table(size_t *num)
+{
+ *num = 0;
+ return NULL;
+}
+
+const struct pad_config *__weak variant_early_gpio_table(size_t *num)
+{
+ *num = ARRAY_SIZE(early_gpio_table);
+ return early_gpio_table;
+}
+
+static const struct cros_gpio cros_gpios[] = {
+ /* TODO */
+};
+
+const struct cros_gpio *__weak variant_cros_gpios(size_t *num)
+{
+ *num = ARRAY_SIZE(cros_gpios);
+ return cros_gpios;
+}
+
+const struct pad_config *__weak variant_romstage_gpio_table(size_t *num)
+{
+ *num = 0;
+ return NULL;
+}
diff --git a/src/mainboard/google/brya/variants/baseboard/nissa/include/baseboard/ec.h b/src/mainboard/google/brya/variants/baseboard/nissa/include/baseboard/ec.h
new file mode 100644
index 0000000000..a2210c63fa
--- /dev/null
+++ b/src/mainboard/google/brya/variants/baseboard/nissa/include/baseboard/ec.h
@@ -0,0 +1,18 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+#ifndef __BASEBOARD_EC_H__
+#define __BASEBOARD_EC_H__
+
+#include <ec/ec.h>
+#include <ec/google/chromeec/ec_commands.h>
+#include <baseboard/gpio.h>
+
+/* TODO: Set the correct values */
+#define MAINBOARD_EC_SCI_EVENTS 0
+#define MAINBOARD_EC_SMI_EVENTS 0
+#define MAINBOARD_EC_S5_WAKE_EVENTS 0
+#define MAINBOARD_EC_S3_WAKE_EVENTS 0
+#define MAINBOARD_EC_S0IX_WAKE_EVENTS 0
+#define MAINBOARD_EC_LOG_EVENTS 0
+
+#endif /* __BASEBOARD_EC_H__ */
diff --git a/src/mainboard/google/brya/variants/baseboard/nissa/include/baseboard/gpio.h b/src/mainboard/google/brya/variants/baseboard/nissa/include/baseboard/gpio.h
new file mode 100644
index 0000000000..9ca9ee7452
--- /dev/null
+++ b/src/mainboard/google/brya/variants/baseboard/nissa/include/baseboard/gpio.h
@@ -0,0 +1,15 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+#ifndef __BASEBOARD_GPIO_H__
+#define __BASEBOARD_GPIO_H__
+
+#include <soc/gpe.h>
+#include <soc/gpio.h>
+
+/* TODO: Set the correct values */
+#define EC_SCI_GPI 0
+#define GPIO_PCH_WP 0
+#define GPIO_EC_IN_RW 0
+#define GPIO_SLP_S0_GATE 0
+
+#endif /* __BASEBOARD_GPIO_H__ */
diff --git a/src/mainboard/google/brya/variants/baseboard/nissa/memory.c b/src/mainboard/google/brya/variants/baseboard/nissa/memory.c
new file mode 100644
index 0000000000..420b36697b
--- /dev/null
+++ b/src/mainboard/google/brya/variants/baseboard/nissa/memory.c
@@ -0,0 +1,22 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+#include <baseboard/gpio.h>
+#include <baseboard/variants.h>
+#include <gpio.h>
+
+const struct mb_cfg *__weak variant_memory_params(void)
+{
+ /* TODO */
+ return NULL;
+}
+
+bool __weak variant_is_half_populated(void)
+{
+ /* TODO */
+ return false;
+}
+
+void __weak variant_get_spd_info(struct mem_spd *spd_info)
+{
+ /* TODO */
+}
diff --git a/src/mainboard/google/brya/variants/nereid/include/variant/ec.h b/src/mainboard/google/brya/variants/nereid/include/variant/ec.h
new file mode 100644
index 0000000000..7a2a6ff8b7
--- /dev/null
+++ b/src/mainboard/google/brya/variants/nereid/include/variant/ec.h
@@ -0,0 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+#ifndef __VARIANT_EC_H__
+#define __VARIANT_EC_H__
+
+#include <baseboard/ec.h>
+
+#endif
diff --git a/src/mainboard/google/brya/variants/nereid/include/variant/gpio.h b/src/mainboard/google/brya/variants/nereid/include/variant/gpio.h
new file mode 100644
index 0000000000..c4fe342621
--- /dev/null
+++ b/src/mainboard/google/brya/variants/nereid/include/variant/gpio.h
@@ -0,0 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+#ifndef VARIANT_GPIO_H
+#define VARIANT_GPIO_H
+
+#include <baseboard/gpio.h>
+
+#endif
diff --git a/src/mainboard/google/brya/variants/nereid/overridetree.cb b/src/mainboard/google/brya/variants/nereid/overridetree.cb
new file mode 100644
index 0000000000..ee861420f6
--- /dev/null
+++ b/src/mainboard/google/brya/variants/nereid/overridetree.cb
@@ -0,0 +1,4 @@
+chip soc/intel/alderlake
+ device domain 0 on
+ end
+end
diff --git a/src/mainboard/google/brya/variants/nivviks/include/variant/ec.h b/src/mainboard/google/brya/variants/nivviks/include/variant/ec.h
new file mode 100644
index 0000000000..7a2a6ff8b7
--- /dev/null
+++ b/src/mainboard/google/brya/variants/nivviks/include/variant/ec.h
@@ -0,0 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+#ifndef __VARIANT_EC_H__
+#define __VARIANT_EC_H__
+
+#include <baseboard/ec.h>
+
+#endif
diff --git a/src/mainboard/google/brya/variants/nivviks/include/variant/gpio.h b/src/mainboard/google/brya/variants/nivviks/include/variant/gpio.h
new file mode 100644
index 0000000000..c4fe342621
--- /dev/null
+++ b/src/mainboard/google/brya/variants/nivviks/include/variant/gpio.h
@@ -0,0 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+#ifndef VARIANT_GPIO_H
+#define VARIANT_GPIO_H
+
+#include <baseboard/gpio.h>
+
+#endif
diff --git a/src/mainboard/google/brya/variants/nivviks/overridetree.cb b/src/mainboard/google/brya/variants/nivviks/overridetree.cb
new file mode 100644
index 0000000000..ee861420f6
--- /dev/null
+++ b/src/mainboard/google/brya/variants/nivviks/overridetree.cb
@@ -0,0 +1,4 @@
+chip soc/intel/alderlake
+ device domain 0 on
+ end
+end