diff options
| author | Felix Held <felix-coreboot@felixheld.de> | 2023-08-03 23:34:40 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2023-08-08 19:45:52 +0000 |
| commit | df9337d3e35e5b5df08663e9d780aaa1d49e152c (patch) | |
| tree | 5db7f0bef62edfe1d40117d78863570e90fc9c64 /src | |
| parent | 8e35a5e93de25a38ffe00d396109008c1fab80be (diff) | |
soc/amd/phoenix/include/data_fabric: add data fabric IO decode registers
PPRs #57019 Rev 3.05 and #57396 Rev 3.06 were used as a reference.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I769dc317115981391cf0f4e0b743c600407a6eb6
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76958
Reviewed-by: Martin L Roth <gaumless@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
| -rw-r--r-- | src/soc/amd/phoenix/include/soc/data_fabric.h | 34 |
1 files changed, 34 insertions, 0 deletions
diff --git a/src/soc/amd/phoenix/include/soc/data_fabric.h b/src/soc/amd/phoenix/include/soc/data_fabric.h index bfe49d58e9..c6942627d7 100644 --- a/src/soc/amd/phoenix/include/soc/data_fabric.h +++ b/src/soc/amd/phoenix/include/soc/data_fabric.h @@ -8,6 +8,40 @@ #define IOMS0_FABRIC_ID 0x13 +#define DF_IO_BASE0 DF_REG_ID(0, 0xd00) +#define DF_IO_LIMIT0 DF_REG_ID(0, 0xd04) + +#define DF_IO_REG_COUNT 8 + +#define DF_IO_REG_OFFSET(instance) ((instance) * 2 * sizeof(uint32_t)) +#define DF_IO_BASE(reg) (DF_IO_BASE0 + DF_IO_REG_OFFSET(reg)) +#define DF_IO_LIMIT(reg) (DF_IO_LIMIT0 + DF_IO_REG_OFFSET(reg)) + +union df_io_base { + struct { + uint32_t re : 1; /* [ 0.. 0] */ + uint32_t we : 1; /* [ 1.. 1] */ + uint32_t : 3; /* [ 2.. 4] */ + uint32_t ie : 1; /* [ 5.. 5] */ + uint32_t : 10; /* [ 6..15] */ + uint32_t io_base : 13; /* [16..28] */ + uint32_t : 3; /* [29..31] */ + }; + uint32_t raw; +}; + +union df_io_limit { + struct { + uint32_t dst_fabric_id : 6; /* [ 0.. 5] */ + uint32_t : 10; /* [ 6..15] */ + uint32_t io_limit : 13; /* [16..28] */ + uint32_t : 3; /* [29..31] */ + }; + uint32_t raw; +}; + +#define DF_IO_ADDR_SHIFT 12 + #define DF_MMIO_BASE0 DF_REG_ID(0, 0xD80) #define DF_MMIO_LIMIT0 DF_REG_ID(0, 0xD84) #define DF_MMIO_SHIFT 16 |